10
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FM93CS56 Rev. C.1
FM93CS56 (MICROWIRE Bus Interface) 2048-Bit Serial EEPROM
with Data Protect and Sequential Read
Timing Diagrams (Continued)
Address
Bits(8)
CS
PE
SK
DI
DO
High - Z
WRITE DISABLE CYCLE (WDS)
Start
Bit
93CS56:
Address bits pattern -> 0-0-x-x-x-x-x-x; (x -> Don't Care, can be 0 or 1)
Opcode
Bits(2)
1 0 0 A7 A6 A1 A0
PRE
t
CS
Address
Bits(8)
Data
Bits(16)
CS
PE
SK
DI
DO
High - Z
t
CS
WRITE CYCLE (WRITE)
Start
Bit
93CS56:
Address bits pattern -> x-A6-A5-A4-A3-A2-A1-A0; (x -> Don't Care, can be 0 or 1); ( A6-A0 -> User defined )
Data bits pattern -> User defined
Opcode
Bits(2)
1 0 1 A7 A6 A1 A0 D15 D14 D1 D0
PRE
Busy
Ready
t
WP
Address
Bits(8)
CS
PE
SK
DI
DO
High - Z
WRITE ENABLE CYCLE (WEN)
Start
Bit
93CS56:
Address bits pattern -> 1-1-x-x-x-x-x-x; (x -> Don't Care, can be 0 or 1)
Opcode
Bits(2)
1 0 0 A7 A6 A1 A0
PRE
t
CS
11
www.fairchildsemi.com
FM93CS56 Rev. C.1
FM93CS56 (MICROWIRE Bus Interface) 2048-Bit Serial EEPROM
with Data Protect and Sequential Read
Timing Diagrams (Continued)
CS
SK
DI
DO
High - Z
Dummy
Bit
1 1 0 A7 A6 A1 A0
PRE
PE
0
D7 D1 D0
t
CS
PROTECT REGISTER READ CYCLE (PRREAD)
Address
Bits(8)
Start
Bit
Opcode
Bits(2)
93CS56:
Address bits pattern -> x-x-x-x-x-x-x-x; (x -> Don't Care, can be 0 or 1)
Address
Bits(8)
CS
PE
SK
DI
DO
High - Z
PROTECT REGISTER ENABLE CYCLE (PREN)
Start
Bit
93CS56:
Address bits pattern -> 1-1-x-x-x-x-x-x; (x -> Don't Care, can be 0 or 1)
Opcode
Bits(2)
1 0 0 A7 A6 A1 A0
PRE
t
CS
Address
Bits(8)
Data
Bits(16)
CS
PE
SK
DI
DO
High - Z
t
CS
WRITE ALL CYCLE (WRALL)
Start
Bit
93CS56:
Address bits pattern -> 0-1-x-x-x-x-x-x; (x -> Don't Care, can be 0 or 1)
Data bits pattern -> User defined
Opcode
Bits(2)
1 0 0 A7 A6 A1 A0 D15 D14 D1 D0
PRE
Busy
Ready
t
WP
12
www.fairchildsemi.com
FM93CS56 Rev. C.1
FM93CS56 (MICROWIRE Bus Interface) 2048-Bit Serial EEPROM
with Data Protect and Sequential Read
Timing Diagrams (Continued)
Address
Bits(8)
CS
PE
SK
DI
DO
High - Z
t
CS
PROTECT REGISTER WRITE CYCLE (PRWRITE)
Start
Bit
93CS56:
Address bits pattern -> x-A6-A5-A4-A3-A2-A1-A0; (x -> Don't Care, can be 0 or 1); ( A6-A0 -> User defined )
Opcode
Bits(2)
1 0 1 A7 A6 A1 A0
PRE
Busy
Ready
t
WP
Address
Bits(8)
CS
PE
SK
DI
DO
High - Z
t
CS
PROTECT REGISTER DISABLE CYCLE (PRDS)
Start
Bit
93CS56:
Address bits pattern -> 0-0-0-0-0-0-0-0
Opcode
Bits(2)
1 0 0 A7 A6 A1 A0
PRE
Busy
Ready
t
WP
Address
Bits(8)
CS
PE
SK
DI
DO
High - Z
t
CS
PROTECT REGISTER CLEAR CYCLE (PRCLEAR)
Start
Bit
93CS56:
Address bits pattern -> 1-1-1-1-1-1-1-1
Opcode
Bits(2)
1 1 1 A7 A6 A1 A0
PRE
Busy
Ready
t
WP

FM93CS56M8

Mfr. #:
Manufacturer:
ON Semiconductor / Fairchild
Description:
EEPROM
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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