7
Display Internal Block Diagram
Figure 1 shows the HDLX-3416 display internal block
diagram. The CMOS IC consists of a 4 x 7 Character RAM, a
2 x 4 Attribute RAM, a 5 bit Control Register, a 128 character
ASCII decoder and the refresh circuitry necessary to syn-
chronize the decoding and driving of four 5 x 7 dot matrix
displays.
Four 7 bit ASCII words are stored in the Character RAM.
The IC reads the ASCII data and decodes it via the 128
character ASCII decoder. The ASCII decoder includes the
64 character set of the HPDL-2416, 32 lower case ASCII
symbols, and 32 foreign language symbols.
A 5 bit word is stored in the Control Register. Three  elds
within the Control Register provide an 8 level brightness
control, master blank, and extended functions disable.
For each display digit location, two bits are stored in the
Attribute RAM. One bit is used to enable a cursor character
at each digit location. A second bit is used to individually
disable the blanking features at each digit location.
The display is blanked and dimmed through an internal
blanking input on the row drivers. Logic within the IC
allows the user to dim the display either through the BL
input or through the brightness control in the control
register. Similarly the display can be blanked through the
BL input, the Master Blank in the Control Register, or the
Digit Blank Disable in the Attribute RAM.
Electrical Description
Pin Function Description
Chip Enable (CE
1
and CE
1
and CE
2
must be a logic 0 to write to the display.
CE
2
, Pins 3 and 4)
Clear (CLR, Pin 5) When CLR is a logic 0 the ASCII RAM is reset to
20hex (space) and the Control Register/Attribute
RAM is reset to 00hex.
Cursor Enable CUE determines whether the IC displays the ASCII or
(CUE Pin 11) the Cursor memory. (1 = Cursor, 0 = ASCII.)
Cursor Select CU determines whether data is stored in the ASCII
(CU, Pin 10) RAM or the Attribute RAM/Control Register.
(1 = ASCII, 0 = Attribute RAM/ Control Register.)
Write (WR, Pin 9) WR must be a logic 0 to store data in the display.
Address Inputs A
0
-A
1
selects a speci c location in the display
(A
1
and A
0
, Pins memory. Address 00 accesses the far right display
7 and 8) location. Address 11 accesses the far left location.
Data Inputs (D
0
-D
6
, D
0
-D
6
are used to specify the input data for
Pins 16 – 22) the display.
V
DD
(Pin 6) V
DD
is the positive power supply input.
GND (Pin 12) GND is the display ground.
Blanking Input BL is used to  ash the display, blank the
(BL, Pin 14) display or to dim the display.
8
Figure 1. Internal block diagram.
CHARACTER RAM ASCII DECODER
CHARACTER/CURSOR
MULTIPLEXER
WRITE
ADDRESS
A
0
– A
1
2
D
0
– D
6
7
DATA IN
DATA
OUT
7
CHARACTER
SELECT
COLUMN
DATA
5
0
3
ROW
SELECT
OSC + 32 + 7
DIGITAL
DUTY
CONTROL
ROW
DRIVERS
DISPLAY
COLUMN
DRIVERS
ROW
SELECT
BLANK
CLR
ATTRIBUTE RAM
DIGIT CURSORD
0
D
1
DIGIT BLANK
DISABLE
CLR
CONTROL REGISTER
MASTER
BLANK
D
2
D
3
– D
5
3
BRIGHTNESS
LEVELS
CLR
D
6
EXTENDED
FUNCTIONS
DISPLAY
WRITE
CLR
CLR
CLR
WRITE
2
READ
ADDRESS
5
1
CURSOR
CHARACTER
CHARACTER/
CURSOR
MULTIPLEXER
SELECT
CUE
DC
n
(4 x 7)
CE
1
CE
2
WR
CU
CE
1
CE
2
WR
CU
WRITE
WRITE ADDRESSA
0
– A
1
READ ADDRESS
2
(2 x 4)
1 x 5
3
4 (LSBs)
2 (MSBs)
3
EFD
EFD
EFD
DBD
n
MB
BL
9
0 = Logic 0; 1 = Logic 1; X = Do Not Care
Figure 2. Display truth table.
Display Clear
Data stored in the Character RAM, Control Register, and
Attribute RAM will be cleared if the clear (CLR) is held
low for a minimum of 10 μs. Note that the display will be
cleared regardless of the state of the chip enables (CE
1
,
CE
2
). After the display is cleared, the ASCII code for a space
(20hex) is loaded into all character RAM locations and
00hex is loaded into all Attribute RAM/Control Register
memory locations.
Data Entry
Figure 2 shows a truth table for the HDLX-3416 display.
Setting the chip enables (CE
1
, CE
2
) to logic 0 and the cursor
select (CU) to logic 1 will enable ASCII data loading. When
cursor select (CU) is set to logic 0, data will be loaded into
the Control Register and Attribute RAM. Address inputs
A
0
-A
1
are used to select the digit location in the display.
Data inputs D
0
-D
6
are used to load information into the
display. Data will be latched into the display on the rising
edge of the WR signal. D
0
-D
6
, A
0
-A
1
, CE
1
, CE
2
, and CU
must be held stable during the write cycle to ensure that
correct data is stored into the display. Data can be loaded
into the display in any order. Note that when A
0
and A
1
are
logic 0, data is stored in the right most display location.
Cursor
When cursor enable (CUE) is a logic 1, a cursor will be
displayed in all digit locations where a logic 1 has been
stored in the Digit Cursor memory in the Attribute RAM.
The cursor consists of all 35 dots ON at half brightness. A
ashing cursor can be displayed by pulsing CUE. When
CUE is a logic 0, the ASCII data stored in the Character RAM
will be dis played regardless of the Digit Cursor bits.
Blanking
Blanking of the display is con trolled through the BL input,
the Control Register, and Attribute RAM. The user can
achieve a variety of functions by using these controls
in di erent combinations, such as full hardware display
blank, software blank, blanking of individual characters,
and syn chronized  ashing of individual characters or
entire display (by strobing the blank input). All of these
blanking modes a ect only the output drivers, maintain-
ing the contents and write capability of the internal RAMs
and Control Register, so that normal loading of RAMs and
Control Register can take place even with the display
blanked.
CUE BL CLR CE
1
CE
2
WR CU A
1
A
0
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Function
0 1 1 Display ASCII
1 1 1 Display Stored Cursor
X X 0
X X X X X X X X X X X X X
Reset RAMs
X 0 1
Blank Display but do not reset
RAMs and Control Register
Extended Intensity Master Digit Digit Write to Attribute RAM
0 0 0 Functions Control Blank Blank Cursor and Control Register
Disable Disable 0 0
0 = 000 = 100% 0 = Digit Digit DBDn = 0, Allows Digit n to be
0 0 1 Enable 001 = 60% Display Blank Cursor blanked
D
1
-D
5
010 = 40% ON Disable 1 1
011 = 27% DBDn = 1 Prevents Digit n from
X X 1 0 0 0 1 = 100 = 17% 1 = Digit Digit being blanked.
0 1 0 Disable 101 = 10% Display Blank Cursor
D
1
-D
5
110 = 7% Blanked Disable 2 2 DCn = 0 Removes cursor from
111 = 3% Digit n
D
0
Digit Digit
0 1 1 Always Blank Cursor DCn = 1 Stores cursor at
Enabled Disable 3 3 Digit n
1 0 0 Digit 0 ASCII Data (Right Most Character)
X X 1 0 0 0 1 0 1 Digit 1 ASCII Data Write to Character RAM
1 1 0 Digit 2 ASCII Data
1 1 1 Digit 3 ASCII Data (Left Most Character)
1 X X
X X 1 X 1 X X X X X X X X X X X No Change
X X 1

HDLY-3416

Mfr. #:
Manufacturer:
Broadcom / Avago
Description:
LED Displays & Accessories Yellow 585nm 1x4 Alphanumeric
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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