Data Sheet HMC8500PM5E
Rev. A | Page 15 of 17
APPLICATIONS INFORMATION
The drain bias voltage is applied through the RFOUT/V
DD
pin,
and the gate bias voltage is applied through the RFIN/V
GG
pin.
For operation of a single application circuit across the entire
frequency range, it is recommended to use the external matching
components specified in the typical application circuit (L1, C1,
C8, C11, and R2) shown in Figure 44. If operation is only
required across a narrower frequency range, performance
can be optimized additionally through the implementation
of alternate matching networks. Capacitive bypassing of V
DD
and V
GG
is recommended.
The recommended power-up bias sequence is as follows:
1. Connect the power supply ground to circuit ground.
2. Set V
GG
to −8 V to pinch off the drain current. Set V
DD
to
28 V (drain current is pinched off). Adjust V
GG
between
−3 V and −2.5 V until a quiescent current of I
DDQ
=
100 mA is obtained.
3. Apply the RF signal.
The recommended power-down bias sequence is as follows:
1. Turn off the RF signal.
2. Set V
GG
to −8 V to pinch off the drain current.
3. Set V
DD
t o 0 V.
4. Set V
GG
t o 0 V.
All measurements for this device were taken using the typical
application circuit, configured as shown in the assembly diagram
(see Figure 44). The bias conditions shown in the electrical
specifications tables (see Table 1 and Table 2) are the operating
points recommended to optimize the overall performance.
Unless otherwise noted, the data shown was taken using the
recommended bias conditions. Operation of the
HMC8500PM5E under other bias conditions may cause
performance that differs from that shown in the Typical
Performance Characteristics section.
The evaluation PCB provides the HMC8500PM5E in the typical
application circuit, allowing easy operation using standard dc
power supplies and 50 Ω RF test equipment.
Figure 44. Typical Application Circuit
1
3
4
2
5
6
7
8
17
18
19
20
21
22
23
24
9
12
1
1
10
13
14
1
5
16
25
26
27
28
29
30
31
32
HMC8500PM5E
GND
NIC
NIC
RFIN/V
GG
RFIN/V
GG
NIC
NIC
GND
EPAD
RFOUT/V
DD
RFOUT/V
DD
GND
NIC
NIC
NIC
NIC
GND
NIC
GND
NIC
NIC
NIC
NIC
GND
NIC
NIC
GND
NIC
NIC
NIC
NIC
GND
NIC
V
GG
C6
10µF
C7
10µF
C4
2.2nF
L4
3.6nH
R1
25Ω
C2
2.2nF
C8
2pF
R2
10Ω
C11
4.3pF
J3
RFOUT
L2
910nH
L1
1.2nH
12
3
4
5
6
7
8
9
12
11
10
13
14
15
16
17
18
19
20
21
22
23
24
25
26
V
GG
V
GG
V
GG
V
GG
J1
V
DD
V
DD
C3
2.2nF
C1
0.8pF
J2
RFIN
C9
10µF
C10
10µF
C5
2.2nF
NOTES
1. CONNECT NIC PINS TO GND FOR BETTER THERMAL PERFORMANCE.
16825-039
