LT3685
7
3685fb
BD (Pin 1): This pin connects to the anode of the boost
Schottky diode. BD also supplies current to the internal
regulator.
BOOST (Pin 2): This pin is used to provide a drive
voltage, higher than the input voltage, to the internal bipolar
NPN power switch.
SW (Pin 3): The SW pin is the output of the internal power
switch. Connect this pin to the inductor, catch diode and
boost capacitor.
V
IN
(Pin 4): The V
IN
pin supplies current to the LT3685’s
internal regulator and to the internal power switch. This
pin must be locally bypassed.
RUN/SS (Pin 5): The RUN/SS pin is used to put the
LT3685 in shutdown mode. Tie to ground to shut down
the LT3685. Tie to 2.5V or more for normal operation. If
the shutdown feature is not used, tie this pin to the V
IN
pin. RUN/SS also provides a soft-start function; see the
Applications Information section.
SYNC (Pin 6): This is the external clock synchronization
input. Ground this pin when SYNC function is not used. Tie
to a clock source for synchronization. Clock edges should
have rise and fall times faster than 1μs. See synchronizing
section in Applications Information.
PG (Pin 7): The PG pin is the open collector output of an
internal comparator. PG remains low until the FB pin is
within 11% of the fi nal regulation voltage. PG output is
valid when V
IN
is above 3.6V and RUN/SS is high.
FB (Pin 8): The LT3685 regulates the FB pin to 0.790V.
Connect the feedback resistor divider tap to this pin.
V
C
(Pin 9): The V
C
pin is the output of the internal error
amplifi er. The voltage on this pin controls the peak switch
current. Tie an RC network from this pin to ground to
compensate the control loop.
R
T
(Pin 10): Oscillator Resistor Input. Connecting a resistor
to ground from this pin sets the switching frequency.
Exposed Pad (Pin 11): Ground. The Exposed Pad must
be soldered to PCB.
+
+
+
OSCILLATOR
200kHz–2.4MHz
V
C
CLAMP
SOFT-START
SLOPE COMP
R
V
IN
V
IN
RUN/SS
BOOST
SW
SWITCH
LATCH
V
C
V
OUT
C2
C3
C
F
L1
C
C
R
C
BD
R
T
R2
GND
ERROR AMP
R1
FB
R
T
C1
PG
0.7V
S
Q
S
3685 BD
4
5
10
7
1
2
3
9
11 8
6
INTERNAL 0.79V REF
SYNC
D1
PIN FUNCTIONS
BLOCK DIAGRAM
LT3685
8
3685fb
The LT3685 is a constant frequency, current mode step-
down regulator. An oscillator, with frequency set by RT,
enables an RS fl ip-fl op, turning on the internal power
switch. An amplifi er and comparator monitor the current
owing between the V
IN
and SW pins, turning the switch
off when this current reaches a level determined by the
voltage at V
C
. An error amplifi er measures the output
voltage through an external resistor divider tied to the FB
pin and servos the V
C
pin. If the error amplifi ers output
increases, more current is delivered to the output; if it
decreases, less current is delivered. An active clamp on the
V
C
pin provides current limit. The V
C
pin is also clamped to
the voltage on the RUN/SS pin; soft-start is implemented
by generating a voltage ramp at the RUN/SS pin using an
external resistor and capacitor.
An internal regulator provides power to the control circuitry.
The bias regulator normally draws power from the V
IN
pin,
but if the BD pin is connected to an external voltage higher
than 3V bias power will be drawn from the external source
(typically the regulated output voltage). This improves
effi ciency. The RUN/SS pin is used to place the LT3685
in shutdown, disconnecting the output and reducing the
input current to less than 1μA.
The switch driver operates from either the input or from
the BOOST pin. An external capacitor and diode are used
to generate a voltage at the BOOST pin that is higher than
the input supply. This allows the driver to fully saturate the
internal bipolar NPN power switch for effi cient operation.
The oscillator reduces the LT3685’s operating frequency
when the voltage at the FB pin is low. This frequency
foldback helps to control the output current during startup
and overload.
The LT3685 contains a power good comparator which trips
when the FB pin is at 89% of its regulated value. The PG
output is an open-collector transistor that is off when the
output is in regulation, allowing an external resistor to pull
the PG pin high. Power good is valid when the LT3685 is
enabled and V
IN
is above 3.6V.
The LT3685 has an overvoltage protection feature which
disables switching action when the V
IN
goes above 38V
typical (36V minimum). When switching is disabled, the
LT3685 can safely sustain input voltages up to 60V.
OPERATION
LT3685
9
3685fb
FB Resistor Network
The output voltage is programmed with a resistor divider
between the output and the FB pin. Choose the 1% resis-
tors according to:
RR
V
V
OUT
12
079
1=
.
Reference designators refer to the Block Diagram.
Setting the Switching Frequency
The LT3685 uses a constant frequency PWM architecture
that can be programmed to switch from 200kHz to 2.4MHz
by using a resistor tied from the R
T
pin to ground. A table
showing the necessary R
T
value for a desired switching
frequency is in Figure 1.
SWITCHING FREQUENCY (MHz) R
T
VALUE (kΩ)
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
187
121
88.7
68.1
56.2
46.4
40.2
34
29.4
23.7
19.1
16.2
13.3
11.5
9.76
8.66
Figure 1. Switching Frequency vs. R
T
Value
Operating Frequency Tradeoffs
Selection of the operating frequency is a tradeoff between
effi ciency, component size, minimum dropout voltage, and
maximum input voltage. The advantage of high frequency
operation is that smaller inductor and capacitor values may
be used. The disadvantages are lower effi ciency, lower
maximum input voltage, and higher dropout voltage. The
highest acceptable switching frequency (f
SW(MAX)
) for a
given application can be calculated as follows:
f
VV
tVVV
SW MAX
D OUT
ON MIN D IN SW
()
()
=
+
+
()
where V
IN
is the typical input voltage, V
OUT
is the output
voltage, V
D
is the catch diode drop (~0.5V) and V
SW
is the
internal switch drop (~0.5V at max load). This equation
shows that slower switching frequency is necessary to
safely accommodate high V
IN
/V
OUT
ratio. Also, as shown
in the next section, lower frequency allows a lower dropout
voltage. The reason input voltage range depends on the
switching frequency is because the LT3685 switch has fi nite
minimum on and off times. The switch can turn on for a
minimum of ~150ns and turn off for a minimum of ~150ns.
Typical minimum on time at 25°C is 80ns. This means that
the minimum and maximum duty cycles are:
DC f t
DC f t
MIN SW ON MIN
MAX SW OFF MIN
=
=
()
()
1
where f
SW
is the switching frequency, the t
ON(MIN)
is the
minimum switch on time (~150ns), and the t
OFF(MIN)
is
the minimum switch off time (~150ns). These equations
show that duty cycle range increases when switching
frequency is decreased.
A good choice of switching frequency should allow ad-
equate input voltage range (see next section) and keep
the inductor and capacitor values small.
Input Voltage Range
The maximum input voltage for LT3685 applications
depends on switching frequency, the Absolute Maximum
Ratings of the V
IN
and BOOST pins, and the operating
mode.
The LT3685 can operate from input voltages up to 38V,
and safely withstand input voltages up 60V. Note that
while V
IN
> 38V (typical), the LT3685 will stop switching,
allowing the output to fall out of regulation.
While the output is in start-up, short-circuit, or other
overload conditions, the switching frequency should be
chosen according to the following discussion.
For safe operation at inputs up to 60V the switching fre-
quency must be set low enough to satisfy V
IN(MAX)
≥ 40V
according to the following equation. If lower V
IN(MAX)
is
desired, this equation can be used directly.
APPLICATIONS INFORMATION

LT3685IMSE#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 38V, 2A, 2.4MHz Step-Down Switching Reg in MSOP
Lifecycle:
New from this manufacturer.
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