1
®
AN1370.0
ISL54065EVAL1Z Evaluation Board
User’s Manual
Description
The ISL54065EVAL1Z evaluation board is designed to
provide a quick and easy method for evaluating the
ISL54065 IC.
The ISL54065 IC is a single supply Dual Single-Pole Double
Throw (SPDT) analog switch with negative swing capability,
sub-Ω ON-resistance and low power dissipation. The
ISL54065 is designed for applications that require an analog
switch that may see voltages below ground at the switch
terminals, such as audio and video. The ISL54065EVAL1Z
evaluation board is developed to evaluate the ISL54065 IC,
integrating many features for ease of use in examining the
performance of the device under various operating
conditions. To help understand the operation of the
ISL54065 IC and the ISL54065EVAL1Z evaluation board, it
is recommended to study the Evaluation Board Schematic
on page 5 of this application note, and refer to the datasheet
for the ISL54065 IC.
The ISL54065 IC is a dual SPDT analog switch that is
capable of swinging down to 6.5V below the positive supply
rail. For example, if the supply is at +1.8V, the switch
terminal analog operating range is from -4.3V to +1.8V. The
ISL54065 also integrates Click and Pop Elimination Circuitry
to remove transient noises at the speaker during power
ON/OFF of an audio system. The evaluation board contains
standard RCA/BNC connectors and a single headphone jack
to allow the user to easily interface with the IC to evaluate its
functions, features, and performance. The evaluation board
has selectable output loads of 20kΩ
and 32Ω resistors to
simulate an audio amplifier pre-amp or stereo headphones.
The board also has DC blocking capacitors at the switch
input to remove the DC bias of single supply amplifiers.
This application note will guide the user through the process
of configuring and using the evaluation board to evaluate the
ISL54065 device.
Key Features
• Selectable Output Resistive Loads and Input DC Blocking
Capacitors
• RCA Audio Input/Output Jacks, Stereo Headphone Output
Jack and BNC Connectors
• Convenient Test Points and Connections for Test
Equipment
• Click and Pop Elimination Circuitry
• Manual or External Logic Input Control
Picture of Evaluation Board (Top View)
Board Architecture/Layout
Basic Layout of Evaluation Board
A picture of the evaluation board is located in Figure 1. The
ISL54065 IC is soldered onto a 12 Ld wide DIP header
board. The DIP header board is mounted to the center of the
evaluation board. The evaluation board integrates the
necessary connections and components to interface with the
ISL54065 for ease of operation.
Power Supply
The ISL54065 IC requires a supply voltage in the range of
+1.8V to +6.5V for proper operation. Banana jacks for V
CC
(J1) and GND (J2) are located at the top of the board. The
evaluation board contains a 10µF bulk capacitor and a 0.1µF
high frequency decoupling capacitor at the supply lines.
Logic Control
The evaluation board contains two types of logic control to
the digital logic inputs of the ISL54065 IC available to the
user. The logic pins can be controlled either through manual
or external operation. The logic control pins are manually
toggled by the SPST switches mounted on the evaluation
board (S1-S3). When the switch is in the up position (H) the
associated logic pin is pulled to V
CC
for logic HIGH. When
the switch is in the down position (L) the associated logic pin
is pulled to GND for logic LOW. For manual operation, the
jumpers JP5-JP8 need to be in the 1-2 position.
Note: When JP6 is in the 1-2 position, the CP pin is
automatically logic HIGH.
For external control via a function generator or switched
source, set the jumpers JP5-JP8 in the 2-3 position. This
FIGURE 1. ISL54065EVAL1Z EVALUATION BOARD
Application Note February 3, 2009
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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