PRODUCT SPECIFICATION ML4812
REV. 1.0.4 5/31/01 7
5V
EA
4
3
+
8V
0.5mA
EA OUT
A
VOL
, OPEN LOOP GAIN (dB)
FREQUENCY (Hz)
10 1k 1M
100 10k 10M100k
100
80
60
40
20
0
-20
EXCESS PHASE (degrees)
0
-30
-60
-90
-120
-150
-180
GAIN
PHASE
6
2
7
16
C
T
RAMP COMP
GM OUT
I
SINE
ERROR CURRENT
9V
5V
I
RAMP COMP
I
SINE
×
ERROR CURRENT
I
RAMP COMP
/2
500
400
300
200
100
0
MULTIPLE OUTPUT CURRENT (µA)
ERROR AMP OUTPUT VOLTAGE (V)
SINE INPUT CURRENT (µA)
0 200 300 500400100
4.5
4.0
3.5
3.0
2.5
2.0
1.5
Output Driver Stage
The ML4812 output driver is a 1A peak output high speed
totem pole circuit designed to quickly drive capacitive loads,
such as power MOSFET gates. (Figure 3)
Error Amplier
The ML4812 error amplifier is a high open loop gain, wide
bandwidth, amplifier.(Figures 4-5)
Gain Modulator
The ML4812 gain modulator is of the current-input type to
provide high immunity to the disturbances caused by high
power switching. The rectified line input sine wave is con-
verted to a current via a dropping resistor. In this way, small
amounts of ground noise produce an insignificant effect on
the reference to the PWM comparator. The output of the gain
modulator is a current of the form: I
OUT
is proportional to
I
SINE
I
EA
, where I
SINE
is the current in the dropping
resistor, and I
EA
is a current proportional to the output of the
error amplifier. When the error amplifier is saturated high,
the output of the gain modulator is approximately equal to
the I
SINE
input current. The gain modulator output current is
converted into the reference voltage for the PWM compara-
tor through a resistor to ground on the gain modulator out-
put. The gain modulator output is clamped to 5V to provide
current limiting.
Ramp compensation is accomplished by subtracting 1/2 of
the current flowing out of RAMP COMP through a buffer
transistor driven by C
T
which is set by an external resistor.
Under Voltage Lockout
On power-up the ML4812 remains in the UVLO condition;
output low and quiescent current low. The IC becomes oper-
ational when V
CC
reaches 16V. When V
CC
drops below
10V, the UVLO condition is imposed. During the UVLO
condition, the 5V VREF pin is “off”, making it usable as a
“flag” for starting up a downstream PWM converter.
Figure 4. Error Amplifier Configuration
Figure 5. Error Amplifier Open-Loop Gain and
Figure 6. Gain Modulator Block Diagram
Figure 7. Gain Modulator Linearity
Phase vs Frequency
ML4812 PRODUCT SPECIFICATION
8 REV. 1.0.4 5/31/01
Typical Applications
Input Inductor (L1) Selection
The central component in the regulator is the input boost
inductor. The value of this inductor controls various critical
operational aspects of the regulator. If the value is too low,
the input current distortion will be high and will result in low
power factor and increased noise at the input. This will
require more input filtering. In addition, when the value of
the inductor is low the inductor dries out (runs out of current)
at low currents. Thus the power factor will decrease at lower
power levels and/or higher line voltages. If the inductor
value is too high, then for a given operating current the
required size of the inductor core will be large and/or the
required number of turns will be high. So a balance must be
reached between distortion and core size.
One more condition where the inductor can dry out is ana-
lyzed below where it is shown to be maximum duty cycle
dependent.
For the boost converter at steady state:
Where D
ON
is the duty cycle [T
ON
/(T
ON
+ T
OFF
)]. The
input boost inductor will dry out when the following condi-
tion is satisfied:
or
V
INDRY
: voltage where the inductor dries out.
V
OUT
: output DC voltage.
Effectively, the above relationship shows that the resetting
volt-seconds are more than setting volt-seconds. In energy
transfer terms this means that less energy is stored in the
inductor during the ON time than it is asked to deliver during
the OFF time. The net result is that the inductor dries out.
Figure 8. Under-Voltage Lockout Block Diagram
Figure 9a. Total Supply Current vs. Supply Voltage
Figure 9b. Supply Current (I
CC
) vs. Temperature
Figure 10. Reference Load Regulation
V
OUT
V
IN
1D
ON
--------------------=
(1)
V
IN
t() V
OUT
< 1D
ON
()×
(2)
V
INDRY
1D
ON
max()[]=V
OUT
×
(3)
ENABLE
V
REF
V
REF
GEN.
9V
INTERNAL
BIAS
5V V
REF
V
CC
+
I
CC
(mA)
V
CC
(V)
0
3020 4010
25
20
15
10
5
0
25
20
15
10
5
0
SUPPLY CURRENT (mA)
TEMPERATURE (degrees)
60 20 60 14010020
40 40 80 1200
OPERATING CURRENT
STARTUP
V
REF
(mV)
I
REF
(mA)
0 40 100
20 60 12080
0
-4
-8
-12
-16
-20
-24
PRODUCT SPECIFICATION ML4812
REV. 1.0.4 5/31/01 9
The recommended maximum duty cycle is 95% at 100KHz
to allow time for the input inductor to dump its energy to
the output capacitors. For example, if: V
OUT
= 380V and
D
ON
(max) = 0.95, then substituting in (3) yields V
INDRY
= 20V. The effect of drying out is an increase in distortion at
low voltages.
For a given output power, the instantaneous value of the
input current is a function of the input sinusoidal voltage
waveform, i.e. as the input voltage sweeps from zero volts to
a maximum value equal to its peak so does the current.
The load of the power factor regulator is usually a switching
power supply which is essentially a constant power load. As
a result, an increase in the input voltage will be offset by a
decrease in the input current.
By combining the ideas set forth above, some ground rules
can be obtained for the selection and design of the input
inductor:
Step 1: Find minimum operating current.
then:
Step 2: Choose a minimum current at which point the
inductor current will be on the verge of drying out. For this
example 40% of the peak current found in step 1 was chosen.
then:
Step 3: The value of the inductance can now be found using
previously calculated data.
The inductor can be allowed to decrease in value when the
current sweeps from minimum to maximum value. This
allows the use of smaller core sizes. The only requirement is
that the ramp compensation must be adequate for the lower
inductance value of the core so that there is adequate com-
pensation at high current.
Step 4: The presence of the ramp compensation will change
the dry out point, but the value found above can be consid-
ered a good starting point. Based on the amount of power
factor correction the above value of L1 can be optimized
after a few iterations.
Gapped Ferrites, Molypermalloy, and Powdered Iron cores
are typical choices for core material. The core material
selected should have a high saturation point and acceptable
losses at the operating frequency.
One ferrite core that is suitable at around 200W is the
#4119PL00-3C8 made by Philips Components (Ferroxcube).
This ungapped core will require a total gap of 0.180" for this
application.
Oscillator Component Selection
The oscillator timing components can be calculated by using
the following expression:
For example:
Step 1: At 100kHz with 95% duty cycle T
OFF
= 500ns
calculate C
T
using the following formula:
Step 2: Calculate the required value of the timing resistor.
Current Sense and Slope (Ramp)
Compensation Component Selection
Slope compensation in the ML4812 is provided internally.
Rather than adding slope to the noninverting input of the
PWM comparator, it is actually subtracted from the voltage
present at the inverting input of the PWM comparator. The
amount of slope compensation should be at least 50% of the
downslope of the inductor current during the off time, as
reflected to the inverting input of the PWM comparator. Note
that slope compensation is required only when the inductor
current is continuous and the duty cycle is more than 50%.
The downslope of the inductor current at the verge of
discontinuity can be found using the expression given below:
The downslope as reflected to the input of the PWM
comparator is given by:
I
IN
min()
PEAK
1.414 P
IN
× min()
V
IN
max()
-------------------------------------------=
P
IN
min()50W=
V
IN
max()260V=
(4)
I
IN
min()
PEAK
0.272A=
I
LDRY
100mA=
L1
V
INDRY
D
ON
max()×
I
LDRY
f
OSC
×
-------------------------------------------------------
20V 0.95×
100mA 100KHz×
---------------------------------------------- 2mH===
(5)
f
OSC
1.36
R
T
C
T
×
--------------------=
(6)
C
T
T
OFF
I
DIS
×
V
OSC
----------------------------- 1 0 0 0 p F==
(7)
(8)
R
T
1.36
f
OSC
C
T
×
-------------------------
1.36
100KHz 100pF×
------------------------------------------- 13.6k== =
choose R
T
= 14k
di
L
dt
--------
V
OUT
V
INDRY
L
-----------------------------------------
380V 20V
2mH
------------------------------ 0.18A µs===
(9)
S
PWM
V
OUT
V
INDRY
L
-----------------------------------------
R
S
N
C
-------==
(10)
S
PWM
380V 20V
2mH
------------------------------=
100
80
---------
× 0.225V µs=

ML4812IQ

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
IC POWER FACTOR CTRLR 20-PLCC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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