1
Features
• EE Programmable 262,144 x 1-, 524,288 x 1-, 1,048,576 x 1-, 2,097,152 x 1-, and
4,194,304 x 1-bit Serial Memories Designed to Store Configuration Programs for Field
Programmable Gate Arrays (FPGAs)
• Available as a 3.3V (±10%) Commercial and Industrial Version
• Simple Interface to SRAM FPGAs
• Pin Compatible with Xilinx
®
XC17SXXXA and XC17SXXXXL PROMs
• Compatible with Xilinx Spartan
®
-II, Spartan-IIE and Spartan XL FPGAs in Master Serial
Mode
• Very Low-power CMOS EEPROM Process
• Available in 8-lead PDIP, 8-lead SOIC, 20-lead SOIC and 44-lead TQFP Packages for a
Specific Density
• Low-power Standby Mode
• High-reliability
– Endurance: Minimum 10 Write Cycles
– Data Retention: 20 Years at 85°C
Description
The AT17N series FPGA Configuration EEPROM (Configurators) provide an easy-to-
use, cost-effective configuration memory for Field Programmable Gate Arrays. The
AT17N series device is packaged in the 8-lead PDIP, 8-lead SOIC, 20-lead SOIC and
44-lead TQFP, see Table 1. The AT17N series Configurators uses a simple serial-
access procedure to configure one or more FPGA devices.
The AT17N series configurators can be pro
grammed with industry-standard program-
mers, Atmel’s ATDH2200E Programming Kit or Atmel’s ATDH2225 ISP Cable and
factory programming.
Table 1. AT17N Series Packages
Package AT17N256
AT17N512/
AT17N010 AT17N002 AT17N040
8-lead PDIP Yes Yes – –
8-lead SOIC Yes – – –
20-lead SOIC Yes Yes Yes –
44-lead TQFP – – Yes Yes
FPGA
Configuration
Memory
AT17N256
AT17N512
AT17N010
AT17N002
AT17N040
3.3V
System Support
Not Recommended
For New Design
AT17N256 replaced by AT17LV256
AT17N512 replaced by AT17LV512
AT17N010 replaced by AT17LV010
AT17N002 replaced by AT17LV002
AT17N040 replaced by AT17LV040
3020C–CNFG–08/07
