AD5541/AD5542 Data Sheet
Rev. F | Page 6 of 20
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
V
OUT
1
AGND
2
REF
3
CS
4
V
DD
8
DGND
7
DIN
6
SCLK
5
AD5541
TOP VIEW
(Not to Scale)
07557-004
Figure 4. AD5541 Pin Configuration
Table 5. AD5541 Pin Function Descriptions
Pin No. Mnemonic Description
1 V
Analog Output Voltage from the DAC.
2 AGND Ground Reference Point for Analog Circuitry.
3 REF Voltage Reference Input for the DAC. Connect to an external 2.5 V reference. Reference can range from 2 V to V
.
4
CS
Logic Input Signal. The chip select signal is used to frame the serial data input.
5 SCLK Clock Input. Data is clocked into the input register on the rising edge of SCLK. Duty cycle must be between 40% and 60%.
6 DIN Serial Data Input. This device accepts 16-bit words. Data is clocked into the input register on the rising edge of SCLK.
Digital Ground. Ground reference for digital circuitry.
8 V
Analog Supply Voltage, 5 V ± 10%.
07557-005
RFB
1
V
OUT
2
AGNDF
3
AGNDS
4
V
DD
14
INV
13
DGND
12
LDAC
11
REFS
5
DIN
10
REFF
6
NC
9
CS
7
SCLK
8
NC = NO CONNECT
AD5542
TOP VIEW
(Not to Scale)
Figure 5. AD5542 Pin Configuration
Table 6. AD5542 Pin Function Descriptions
Pin No. Mnemonic Description
1 RFB Feedback Resistor Pin. In bipolar mode, connect this pin to the external op amp output.
2 V
Analog Output Voltage from the DAC.
Ground Reference Point for Analog Circuitry (Force).
4 AGNDS Ground Reference Point for Analog Circuitry (Sense).
5 REFS Voltage Reference Input (Sense) for the DAC. Connect to an external 2.5 V reference. Reference can range from 2 V to V
.
6 REFF Voltage Reference Input (Force) for the DAC. Connect to an external 2.5 V reference. Reference can range from 2 V to V
.
7
CS
Logic Input Signal. The chip select signal is used to frame the serial data input.
8 SCLK Clock Input. Data is clocked into the input register on the rising edge of SCLK. Duty cycle must be between 40% and 60%.
9 NC No Connect.
10 DIN Serial Data Input. This device accepts 16-bit words. Data is clocked into the input register on the rising edge of SCLK.
11
LDAC
LDAC
Input. When this input is taken low, the DAC register is simultaneously updated with the contents of the
input register.
12 DGND Digital Ground. Ground reference for digital circuitry.
Connected to the Internal Scaling Resistors of the DAC. Connect the INV pin to external op amps inverting input in
bipolar mode.
14 V
Analog Supply Voltage, 5 V ± 10%.