10
LTC1143/LTC1143L
LTC1143L-ADJ
Once the frequency has been set by C
T
, the inductor L must
be chosen to provide no more than 25mV/R
SENSE
of peak-
to-peak inductor ripple current. This results in a minimum
required inductor value of:
L
MIN
= 5.1(10
5
)(R
SENSE
)(C
T
)V
REG
As the inductor value is increased from the minimum
value, the ESR requirements for the output capacitor are
eased at the expense of efficiency. If too small an inductor
is used, the inductor current will become discontinuous
before the LTC1143 series enters Burst Mode operation. A
consequence of this is that the LTC1143 series will delay
entering Burst Mode operation and efficiency will be
degraded at low currents.
Inductor Core Selection
Once the minimum value for L is known, the type of
inductor must be selected. The highest efficiency will be
obtained using Ferrite, Kool Mµ
®
or Molypermalloy (MPP)
cores. Lower cost powdered iron cores provide suitable
performance, but cut efficiency by 3% to 7%. Actual core
loss is independent of core size for a fixed inductor value,
but it is very dependent on inductance selected. As
inductance increases, core losses go down. Unfortunately,
increased inductance requires more turns of wire and
therefore copper losses will increase.
Ferrite designs have very low core loss, so design goals
can concentrate on copper loss and preventing saturation.
Ferrite core material saturates “hard,” which means that
inductance collapses abruptly when the peak design current
is exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple that
can cause Burst Mode operation to be falsely triggered. Do
not allow the core to saturate!
Kool Mµ (from Magnetics, Inc.) is a very good, low loss core
material for toroids with a “soft” saturation characteristic.
Molypermalloy is slightly more efficient at high ( > 200 kHz)
switching frequencies but quite a bit more expensive.
Toroids are very space efficient, especially when you can
use several layers of wire, while inductors wound on
bobbins are generally easier to surface mount. New designs
for surface mount are available from Coiltronics, Coilcraft
and Sumida.
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Power MOSFET Selection
An external power MOSFET must be selected for use with
each section of the LTC1143 series. The main selection
criteria for the power MOSFETs are the threshold voltage
V
GS(TH)
, maximum V
GS
rating and on resistance R
DS(ON)
.
Surface mount P-channel power MOSFETs are widely
available in both single and dual configurations. Logic
level MOSFETs are specified for operation up to 20V
maximum V
GS
and guarantee a maximum R
DS(ON)
with
V
GS
= 4.5V. Newer ‘sub’ logic level MOSFETs allow only 8V
maximum V
GS
but guarantee R
DS(ON)
with V
GS
= 2.7V. If
V
IN
will exceed 8V, logic level MOSFETs must be used; if
conservatively specified, they are generally usable down
to the 3.5V minimum V
IN
rating of the LTC1143L and
LTC1143L-ADJ.
The maximum output current I
MAX
determines the R
DS(ON)
requirement for the two MOSFETs. When the LTC1143
series is operating in continuous mode, the simplifying
assumption can be made that either the MOSFET or
Schottky diode is always conducting the average load
current. The duty cycles for the MOSFET and diode are
given by:
PCh
V
Schottky
VV
V
IN
OUT D
IN
- Duty Cycle
V
Diode Duty Cycle =
V
OUT
IN
−+
()
From the duty cycles the required R
DS(ON)
for each MOSFET
can be derived:
PCh
P
V
I
P
OUT MAX
P
- R =
V
DS(ON)
IN
()
+
()
2
1δ
where P
P
is the allowable power dissipation and δ
P
is the
temperature dependencies of R
DS(ON)
. P
P
will be determined
by efficiency and/or thermal requirements (see Efficiency
Considerations). (1+ δ
P
) is generally given for a MOSFET in
the form of a normalized R
DS(ON)
vs temperature curve,
Kool Mµ is a registered trademark of Magnetics, Inc.
11
LTC1143/LTC1143L
LTC1143L-ADJ
APPLICATIONS INFORMATION
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RMS current must be used. The maximum RMS capacitor
current is given by:
CI
VVV
V
IN MAX
OUT IN OUT
IN
Required I
RMS
()
[]
12/
This formula has a maximum at V
IN
= 2V
OUT
, where I
RMS
= I
OUT
/2. This simple worst-case condition is commonly
used for design because even significant deviations do not
offer much relief. Note that capacitor manufacturer’s
ripple current ratings are often based on only 2000 hours
of life. This makes it advisable to further derate the
capacitor, or to choose a capacitor rated at a higher
temperature than required. Several capacitors may also be
paralleled to meet size or height requirements in the
design. Always consult the manufacturer if there is any
question. An additional 0.1µF to 1µF ceramic capacitor is
also required on each V
IN
line (Pins 5, 13) for high
frequency decoupling.
The selection of C
OUT
is driven by the required (ESR).
The
ESR of C
OUT
must be less than twice the value of R
SENSE
for proper operation of the LTC1143 series:
C
OUT
Required ESR < 2R
SENSE
Optimum efficiency is obtained by making the ESR equal
to R
SENSE
. As the ESR is increased up to 2R
SENSE
the
efficiency degrades by less than 1%. If the ESR is greater
than 2R
SENSE
, the voltage ripple on the output capacitor
will prematurely trigger Burst Mode operation, resulting in
disruption of continuous mode and an efficiency hit which
can be several percent.
Manufacturers such as Nichicon and United Chemicon
should be considered for high performance capacitors.
The OS-CON semiconductor dielectric capacitor available
from Sanyo has the lowest ESR size/ratio of any aluminum
electrolytic at a somewhat higher price. Once the ESR
requirement for C
OUT
has been met, the RMS current
rating generally far exceeds the I
RIPPLE(P-P)
requirement.
In surface mount applications multiple capacitors may
have to be parallel to meet the capacitance, ESR or RMS
current handling requirements of the application.
but δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs.
When selecting the P-channel power MOSFET for each
section, consideration should be given to using a dual MOSFET
with the other half used for the second regulator. Assuming
both sections are operating at similar currents, the required
R
DS(ON)
will be half the value of a single MOSFET to stay within
the package dissipation limit.
Remember that worst-case
MOSFET dissipation occurs at minimum V
IN
.
Output Diode Selection (D1, D2)
The Schottky diodes D1 and D2 shown in Figure 1 conduct
during the off-time. It is important to adequately specify
the diode peak current and average power dissipation to
not exceed the diode ratings.
The most stressful condition for the output diode is under
short circuit (V
OUT
= 0V). Under this condition the diode
must safely handle I
SC(PK)
at close to 100% duty cycle.
Under normal load conditions the average current con-
ducted by the diode is:
I
VV V
V
I
DIODE
IN OUT D
IN
LOAD
=
−+
()
()
Remember to keep lead lengths short and observe proper
grounding (see Board Layout Checklist) to avoid ringing
and increased dissipation.
The forward voltage drop allowable in the diode is calcu-
lated from the maximum short-circuit current as:
V
P
I
F
D
SC PK
()
where P
D
is the allowable power dissipation and will be
determined by efficiency and/or thermal requirements
(see Efficiency Considerations).
C
IN
and C
OUT
Selection
In continuous mode, the source current of the P-channel
MOSFET is a square wave of duty cycle V
OUT
/V
IN
. To
prevent large voltage transients, a low effective series
resistance (ESR) input capacitor sized for the maximum
12
LTC1143/LTC1143L
LTC1143L-ADJ
APPLICATIONS INFORMATION
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During this recovery time V
OUT
can be monitored for
overshoot or ringing which would indicate a stability
problem. The Pin 15(7) external components shown in the
Figure 1 circuit will prove adequate compensation for
most applications.
A second, more severe transient is caused by switching in
loads with large (>1µF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with C
OUT
causing a rapid drop in V
OUT
. No regulator can
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately 25 • C
LOAD
.
Thus a 10µF capacitor would require a 250µs rise time,
limiting the charging current to about 200mA.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can be
expressed as:
%Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage
of input power. (For high efficiency circuits only small
errors are incurred by expressing losses as a percentage
of output power.)
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC1143 series circuits:
1) DC bias current
2) MOSFET gate charge current
3) I
2
R losses
4) Voltage drop of the Schottky diode.
1) The DC supply current is the current that flows into
V
IN
(Pin 13 and Pin 5) less the gate charge current. For
V
IN
= 10V the DC supply current for each section is 160µA
for no load and increases proportionally with load up to
a constant 1.6mA after the LTC1143 series has entered
continuous mode. Because the DC bias current is
Aluminum electrolytic and dry tantalum capacitors are
both available in surface mount configurations. In the case
of tantalum it is critical that the capacitors are surge tested
for use in switching power supplies. An excellent choice is
the AVX TPS series of surface mount tantalums, available
in case heights ranging from 2mm to 4mm. For example,
if 200µF/10V is called for in an application requiring 3mm
height, (2) AVX 100µF/10V (P/N TPSD 107M010) could be
used. Consult the manufacturer for other specific
recommendations.
At low supply voltages a minimum
capacitance at C
OUT
is
needed to prevent an abnormal low frequency operating
mode (see Figure 4). When C
OUT
is made too small the
output ripple at low frequencies will be large enough to trip
the voltage comparator. This causes Burst Mode operation
to be activated when the LTC1143 series would normally
be in continuous operation. The output remains in
regulation at all times.
V
IN
– V
OUT
VOLTAGE (V)
0
C
OUT
(µF)
1000
800
600
400
200
0
4
1143 F04
1
2
3
5
L = 50µH
R
SENSE
= 0.02
L = 25µH
R
SENSE
= 0.02
L = 50µH
R
SENSE
= 0.05
Figure 4. Minimum Value of C
OUT
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in DC (resistive) load
current. When a load step occurs, V
OUT
shifts by an
amount equal to I
LOAD
× ESR, where ESR is the effective
series resistance of C
OUT
. I
LOAD
also begins to charge or
discharge C
OUT
until the regulator loop adapts to the
current change and returns V
OUT
to its steady-state value.

LTC1143CS#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 2x Hi Eff SO-16 Buck Sw Reg Cntrs
Lifecycle:
New from this manufacturer.
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