(Preliminary) PL585-XX
19MHz to 800MHz Low Phase-Noise VCXO
Micrel Inc. • 2180 Fortune Drive • San Jos e, CA 95131 • USA • tel +1(408) 944 -0800 • f ax +1(408) 474-1000 • ww w.micr el.com Rev 11/18/11 Page 3
FUNCTIONAL DESCRIPTION
PL585 family of products is an advanced,
programmable LCVCO VCXO IC that is designed to
meet the most stringent performance specifications
for phase noise, jitter, and power consumption.
There are two main types of VCOs, a) Ring
Oscillator, b) LC Tank oscillator. An LCVCO is made
up of LC tank oscillator. Although a Ring Oscillator
has very good performance, and has a good tuning
range, its phase noise and jitter performance , in
particular at higher frequencies, degrades.
On the other hand, an LCVCO has an outstanding
phase noise and jitter performance, even at higher
frequencies. PL585 family of products takes
advantage of this state of the art technology, and
incorporates the LC tank on-chip, for optimal
performance.
PL585 family of products exhibit very low phase
noise/phase jitter and peak to peak jitter, wide tuning
range, and very low-power. All members of the
PL585 family accept a low-cost fundamental crystal
input of 19MHz to 44MHz, and its flexible core is
capable of producing any output frequency between
19MHz to 800MHz.
PLL Programming
The PLL in the PL585 family is fully programmable.
Micrel programming software is used to configure and
program the IC.
OE (Output Enable)
The OE pin in PL585 family, through programming,
can be configured to support OE pin activation with a
logic ‘1’ or logic ’0’, to provide you with the desired
enable polarity.
OE Options
(Programmable)
In addition, The OE feature can be programmed to
allow the output to float (Hi Z), or to operate in the
‘Active low’ mode, for CMOS outputs. The
programming control for the OE options is shown
below:
Normal Operation (Default)
Note: Typical enable time is <50ns plus one clock period.
The OE pin incorporates a 60KΩ resistor to either
pull-up or pull-down to the default state when the OE
pin is left open.
Power-Down Control (PDB)
When activated, this programmable feature ‘Disables
the VCO, the oscillator circuitry, counters, and all
other active circuitry. PDB activation disables all
outputs and the IC consumes <15µA of power, in the
power down mode, to conserve power. The PDB
input incorporates a 10MΩ pull up resistor for
normal operating condition.
The PDB feature can be programmed to allow the
output to float (Hi Z), or to operate in the ‘Active low’
mode, in CMOS output. The logic for PDB is shown
below:
Normal Operation (Default)
Note: Typical enable time is <10ms.
