TEA1833LTS All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 1 — 31 August 2015 10 of 24
NXP Semiconductors
TEA1833LTS
GreenChip SMPS control IC
The output voltage can drop, for instance, because a load is too high or a short circuit
event occurs. If the output voltage drops, the decrease of the transformer current during
the secondary stroke time (t
sec
) becomes less. As a result, the next cycle starts at a higher
peak current.
Also, at the next cycle, the minimum on-time equals the blanking time. During this
blanking time, the peak current can increase to above the targeted regulation level. If the
transformer current does not decrease sufficiently during the secondary stroke, the peak
current can continuously increase to such a level that the transformer saturates
(see Figure 10
).
To avoid this continuous peak current increase, also called runaway, the IC features a
special protection (see Figure 11
).
If the system detects that the peak current already exceeds the targeted level after 1 s,
the next switching period time is extended from 7.7 s (f
sw
=130kHz) to 28s
(f
sw
= 36 kHz). The time of the secondary stroke is then sufficient to decrease the
transformer current to below the targeted peak current again.
Fig 10. Peak current runaway
Fig 11. OSCP peak current runaway
RXWSXWYROWDJH
,
UHJ
W
VHF
W
SHU
W
RQ 
W
EODQN
,
WUDIR
GULYHU
SULPDU\
FXUUHQW
VHFRQGDU\
FXUUHQWVFDOHG
WRSULPDU\VLGH
DDD
RXWSXWYROWDJH
,
UHJ
W
SHU
,
WUDIR
GULYHU
DDD
SULPDU\
FXUUHQW
VHFRQGDU\
FXUUHQWVFDOHG
WRSULPDU\VLGH
TEA1833LTS All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 1 — 31 August 2015 11 of 24
NXP Semiconductors
TEA1833LTS
GreenChip SMPS control IC
To avoid activation at low loads, the OSCP is only enabled when the overpower timer is
active. Additionally, to avoid activation during peak power, V
out
must be below half the
OVP level.
The V
out
level is measured on the ISENSE pin in a similar way the overvoltage protection
is measured.
To limit the input power during a short circuit or an overload event, the OPP time is
reduced to 50 % when OSCP is enabled.
7.12 Peak power, high-power medium power, and low-power operation
During high-power operation, with the converter running at a 65 kHz (typical) fixed
frequency, the power is controlled by varying the peak current.
A peak power mode is implemented to supply a short overload situation. In peak power
mode, both frequency and peak current are increased.
In medium power operation, lowering the switching frequency to 25 kHz reduces the
switching losses.
In low-power operation, lowering of the switching frequency to below 25 kHz further
reduces switching losses. The switching frequency of the converter is reduced while the
peak current is set to 22 % of the maximum peak current (see Figure 8
and Figure 12).
Fig 12. Frequency control
9
&75/
9
DDD
      

/RZSRZHU
I
VZLWFK
N+]







+LJKLQSXWYROWDJH
3HDNSRZHU
/RZLQSXW
YROWDJH
0HGLXP
SRZHU
+LJK
SRZHU
TEA1833LTS All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 1 — 31 August 2015 12 of 24
NXP Semiconductors
TEA1833LTS
GreenChip SMPS control IC
7.13 Overpower or high/low line compensation
The overpower compensation function can be used to realize a maximum output power
which is nearly constant over the full input mains. The overpower compensation circuit
measures the mains detect input current on the PROTECT pin and outputs a
proportionally dependent current on the ISENSE pin. The DC voltage across resistor R3
(see Figure 3
) limits the maximum peak current on the current sense resistor (see
Figure 13
).
At low output power levels, the overpower compensation circuit is switched off.
7.14 Burst mode
If the CTRL voltage (V
CTRL
) is < 1.45 V, the system is not switching. It waits until the V
CTRL
exceeds this minimum level before starting the next cycle. During this period, the
TEA1833LTS discharges the primary VCC capacitor. If the voltage on the VCC pin then
drops to below the burst threshold level (V
th(burst)
), the system asserts two DRIVER pulses
to recharge the VCC capacitor. The assertion avoids that the voltage on the VCC pin
drops to below the UVLO level during a large off-time.
Worst off-time occurs when there is a load transient from peak load to no-load. The output
voltage shows an overshoot and stops switching until the output voltage drops to below
the regulation level while there is no-load at the output.
For minimum no-load input power, the chosen value of the external capacitor at the VCC
pin must be high enough to prevent that the voltage on the VCC pin drops below the burst
threshold level at continuous no-load operation. The burst mode is only intended to assist
at load changes until the output voltage drops to below the regulation level while there is
no-load at the output.
Fig 13. Overpower compensation
,
3527(&7
$
DDD
 

O
RSF,6(16(
$

TEA1833LTS/1H

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
AC/DC Converters GreenChip SMPS Control IC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet