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ADG621BRMZ-REEL

P1-P3P4-P6P7-P9P10-P12
CMOS ±5 V/+5 V,
4 Ω Dual SPST Switches
ADG621/ADG622/ADG623
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result fro
m its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
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Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2001–2009 Analog Devices, Inc. All rights reserved.
FEATURES
5.5 Ω (maximum) on resistance
0.9 Ω (maximum) on resistance flatness
2.7 V to 5.5 V single supply
±2.7 V to ±5.5 V dual supply
Rail-to-rail operation
10-lead MSOP package
Typical power consumption (<0.01 µW)
TTL-/CMOS-compatible inputs
APPLICATIONS
Automatic test equipment
Power routing
Communication systems
Data acquisition systems
Sample-and-hold systems
Avionics
Relay replacements
Battery-powered systems
GENERAL DESCRIPTION
The ADG621/ADG622/ADG623 are monolithic, CMOS,
single-pole, single-throw (SPST) switches. Each switch of the
ADG621/ADG622/ADG623 conducts equally well in both
directions when on.
The ADG621/ADG622/ADG623 contain two independent
switches. The ADG621 and ADG622 differ only in that both
switches are normally open and normally closed. In the ADG623,
Switch 1 is normally open, and Switch 2 is normally closed. The
ADG623 exhibits break-before-make switching action.
The ADG621/ADG622/ADG623 offer low on resistance of
4 Ω, which is matched to within 0.25 Ω between channels.
These switches also provide low power dissipation yet give
high switching speeds. The ADG621/ADG622/ADG623 are
available in a 10-lead MSOP package.
FUNCTIONAL BLOCK DIAGRAMS
ADG621
IN1
D2
S2
S1
D1
IN2
NOTES
1. SWITCHES SHOWN FOR A LOGIC 0 INPUT
02616-001
Figure 1.
ADG622
IN1
D2
S2
S1
D1
IN2
NOTES
1. SWITCHES SHOWN FOR A LOGIC 0 INPUT
02616-002
Figure 2.
ADG623
IN1
D2
S2
S1
D1
IN2
NOTES
1. SWITCHES SHOWN FOR A LOGIC 0 INPUT
02616-003
Figure 3.
PRODUCT HIGHLIGHTS
1. Low on resistance, R
ON
(4 Ω typical).
2. Dual ±2.7 V to ±5.5 V or single +2.7 V to +5.5 V.
3. Low power dissipation; CMOS construction ensures low
power dissipation.
4. Tiny 10-lead MSOP package.
ADG621/ADG622/ADG623
Rev. B | Page 2 of 12
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagrams ............................................................. 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Dual Supply ................................................................................... 3
Single Supply ................................................................................. 4
Absolute Maximum Ratings.............................................................5
ESD Caution...................................................................................5
Pin Configuration and Function Descriptions ..............................6
Terminology .......................................................................................7
Typical Performance Characteristics ..............................................8
Test Circuits ......................................................................................10
Outline Dimensions ........................................................................12
Ordering Guide............................................................................12
REVISION HISTORY
11/09—R ev. A to Rev. B
Changes to Table 5 ............................................................................ 5
Changes to Ordering Guide .......................................................... 12
6/07—Rev. 0 to Rev. A
Change to On Resistance Flatness, R
FLAT(ON)
Specification (Table 1) ...................................................................... 3
Change to On Resistance Flatness, R
FLAT(ON)
Specification (Table 2) ...................................................................... 4
Added Table 6.................................................................................... 6
Changes to Terminology Section.................................................... 7
Changes to Figure 13 ........................................................................ 9
Updated Outline Dimensions ....................................................... 12
Changes to Ordering Guide .......................................................... 12
11/01—Revision 0: Initial Ver si o n
ADG621/ADG622/ADG623
Rev. B | Page 3 of 12
SPECIFICATIONS
DUAL SUPPLY
1
V
DD
= +5 V ± 10%, V
SS
= −5 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1.
Parameter +25°C −40°C to +85°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range V
SS
to V
DD
V V
DD
= +4.5 V, V
SS
= −4.5 V
On Resistance, R
ON
4 Ω typ
V
S
= ±4.5 V, I
S
= −10 mA, see Figure 16
5.5 7 Ω max
On Resistance Match Between Channels, ∆R
ON
0.25 Ω typ V
S
= ±4.5 V, I
S
= −10 mA
0.35 0.4 Ω max
On Resistance Flatness, R
FLAT(ON)
0.9 0.9 Ω typ V
S
= ±3.3 V, I
S
= −10 mA
1.5 Ω max
LEAKAGE CURRENTS V
DD
= +5.5 V, V
SS
= −5.5 V
Source Off Leakage, I
S
(Off) ±0.01 nA typ
V
S
= ±4.5 V, V
D
=
4.5 V, see Figure 17
±0.25 ±1 nA max
Drain Off Leakage, I
D
(Off) ±0.01 nA typ
V
S
= ±4.5 V, V
D
=
4.5 V, see Figure 17
±0.25 ±1 nA max
Channel On Leakage, I
D
, I
S
(On) ±0.01 nA typ
V
S
= V
D
= ±4.5 V, see Figure 18
±0.25 ±1 nA max
DIGITAL INPUTS
Input High Voltage, V
INH
2.4 V min
Input Low Voltage, V
INL
0.8 V max
Input Current, I
INL
or I
INH
0.005 µA typ V
IN
= V
INL
or V
INH
±0.1 µA max
Digital Input Capacitance, C
IN
2 pF typ
DYNAMIC CHARACTERISTICS
2
t
ON
75 ns typ
R
L
= 300 Ω, C
L
= 35 pF; V
S
= 3.3 V, see Figure 19
120 155 ns max
t
OFF
45 ns typ
R
L
= 300 Ω, C
L
= 35 pF; V
S
= 3.3 V, see Figure 19
70 85 ns max
Break-Before-Make Time Delay, t
BBM
(ADG623 Only) 30 ns typ R
L
= 300 Ω, C
L
= 35 pF; V
S1
= V
S2
= 3.3 V
10 ns min
See
Figure 20
Charge Injection 110 pC typ
V
S
= 0 V, R
S
= 0 Ω, C
L
= 1 nF, see Figure 21
Off Isolation −65 dB typ
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz, see Figure 22
Channel-to-Channel Crosstalk −90 dB typ
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz, see Figure 23
Bandwidth −3 dB 230 MHz typ
R
L
= 50 Ω, C
L
= 5 pF, see Figure 24
C
S
(Off) 20 pF typ f = 1 MHz
C
D
(Off) 20 pF typ f = 1 MHz
C
D
, C
S
(On) 70 pF typ f = 1 MHz
POWER REQUIREMENTS V
DD
= 5.5 V, V
SS
= –5.5 V
I
DD
0.001 µA typ Digital inputs = 0 V or 5.5 V
1.0 µA max
I
SS
0.001 µA typ Digital inputs = 0 V or 5.5 V
1.0 µA max
1
Temperature range is as follows: B version, –40°C to +85°C.
2
Guaranteed by design; not subject to production test.
P1-P3P4-P6P7-P9P10-P12

ADG621BRMZ-REEL

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Manufacturer:
Analog Devices Inc.
Description:
Analog Switch ICs 4 Ohm 5.5V CMOS Dual SPST
Lifecycle:
New from this manufacturer.
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