74FCT3807QGI8

4
COMMERCIAL/INDUSTRIAL TEMPERATURE RANGES
IDT74FCT3807/A
3.3V CMOS 1-TO-10 CLOCK DRIVER
NOTES:
1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. tPLH, tPHL, tSK(t) are production tested. All other parameters guaranteed but not production tested.
4. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay limits do not imply skew.
FCT3807 FCT3807A
Symbol Parameter Conditions
(1)
Min.
(2)
Max. Min.
(2)
Max. Unit
tPLH Propagation Delay CL = 30pF 1.5 4.5 1.5 4 ns
tPHL f67MHz
tR Output Rise Time (0.8 to 2V) (See figure 3) 1.5 1.5 ns
tF Output Fall Time (0.8 to 2V) 1.5 1.5 ns
tSK(O) Output skew: skew between outputs of 0.5 0.35 ns
same package (same transition)
t
SK(P) Pulse skew: skew between opposite transitions 0.5 0.35 ns
of same output (|tPHL -– tPLH|)
t
SK(T) Package skew: skew between outputs of different 1 0.75 ns
packages at same power supply voltage,
temperature, package type and speed grade
FCT3807 FCT3807A
Symbol Parameter Conditions
(1)
Min.
(2)
Max. Min.
(2)
Max. Unit
tPLH Propagation Delay CL = 50pF 1.5 4.8 1.5 4.3 ns
tPHL f40MHz
tR Output Rise Time (0.8 to 2V) (See figure 4) 1.5 1.5 ns
tF Output Fall Time (0.8 to 2V) 1.5 1.5 ns
tSK(O) Output skew: skew between outputs of 0.5 0.35 ns
same package (same transition)
tSK(P) Pulse skew: skew between opposite transitions 0.5 0.35 ns
of same output (|tPHL -– tPLH|)
tSK(T) Package skew: skew between outputs of different 1 0.75 ns
packages at same power supply voltage,
temperature, package type and speed grade
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - COMMERCIAL
(3,4)
FCT3807 FCT3807A
Symbol Parameter Conditions
(1)
Min.
(2)
Max. Min.
(2)
Max. Unit
tPLH Propagation Delay 50Ω to VCC/2 1.5 3.5 1.5 3 ns
tPHL CL = 10pF
tR Output Rise Time (0.8 to 2V) (See figure 1) 1.5 1.5 ns
tF Output Fall Time (0.8 to 2V) or 10Ω AC 1.5 1.5 ns
tSK(O) Output skew: skew between outputs of termination, 0.5 0.35 ns
same package (same transition) CL = 50pF
tSK(P) Pulse skew: skew between opposite transitions (See figure 2) 0.5 0.35 ns
of same output (|tPHL -– tPLH|) f100MHz
t
SK(T) Package skew: skew between outputs of different Outputs 0.9 0.65 ns
packages at same power supply voltage, connected in
temperature, package type and speed grade groups of two
5
IDT74FCT3807/A
3.3V CMOS 1-TO-10 CLOCK DRIVER
COMMERCIAL/INDUSTRIAL TEMPERATURE RANGES
NOTES:
1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. tPLH, tPHL, tSK(t) are production tested. All other parameters guaranteed but not production tested.
4. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay limits do not imply skew.
FCT3807 FCT3807A
Symbol Parameter Conditions
(1)
Min.
(2)
Max. Min.
(2)
Max. Unit
tPLH Propagation Delay CL = 30pF 1.5 4.5 1.5 4 ns
tPHL f67MHz
tR Output Rise Time (0.8 to 2V) (See figure 3) 1.5 1.5 ns
tF Output Fall Time (0.8 to 2V) 1.5 1.5 ns
tSK(O) Output skew: skew between outputs of 0.6 0.45 ns
same package (same transition)
tSK(P) Pulse skew: skew between opposite transitions 0.6 0.45 ns
of same output (|tPHL -– tPLH|)
tSK(T) Package skew: skew between outputs of different 1 0.75 ns
packages at same power supply voltage,
temperature, package type and speed grade
FCT3807 FCT3807A
Symbol Parameter Conditions
(1)
Min.
(2)
Max. Min.
(2)
Max. Unit
tPLH Propagation Delay CL = 50pF 1.5 4.8 1.5 4.3 ns
tPHL f40MHz
tR Output Rise Time (0.8 to 2V) (See figure 4) 1.5 1.5 ns
tF Output Fall Time (0.8 to 2V) 1.5 1.5 ns
tSK(O) Output skew: skew between outputs of 0.6 0.45 ns
same package (same transition)
tSK(P) Pulse skew: skew between opposite transitions 0.6 0.45 ns
of same output (|tPHL -– tPLH|)
t
SK(T) Package skew: skew between outputs of different 1 0.75 ns
packages at same power supply voltage,
temperature, package type and speed grade
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - INDUSTRIAL
(3,4)
FCT3807 FCT3807A
Symbol Parameter Conditions
(1)
Min.
(2)
Max. Min.
(2)
Max. Unit
tPLH Propagation Delay 50Ω to VCC/2 1.5 3.5 1.5 3 ns
tPHL CL = 10pF
tR Output Rise Time (0.8 to 2V) (See figure 1) 1.5 1.5 ns
tF Output Fall Time (0.8 to 2V) or 50Ω AC 1.5 1.5 ns
tSK(O) Output skew: skew between outputs of termination, 0.6 0.45 ns
same package (same transition) CL = 10pF
tSK(P) Pulse skew: skew between opposite transitions (See figure 2) 0.6 0.45 ns
of same output (|tPHL -– tPLH|) f100MHz
tSK(T) Package skew: skew between outputs of different Outputs 0.9 0.65 ns
packages at same power supply voltage, connected in
temperature, package type and speed grade groups of two
6
COMMERCIAL/INDUSTRIAL TEMPERATURE RANGES
IDT74FCT3807/A
3.3V CMOS 1-TO-10 CLOCK DRIVER
D.U.T.
Pulse
Generator
VIN
VOUT
VCC
RT
VCC
100
100
10pF
D.U.T.
Pulse
Generator
VIN
VOUT
VCC
RT
50
10pF
220pF
30pF
D.U.T.
Pulse
Generator
VIN
VOUT
VCC
RT
CL
50pF
D.U.T.
Pulse
Generator
VIN
VOUT
VCC
RT
CL
50pF
C
L
D.U.T.
Pulse
Generator
VIN
VOUT
VCC
RT
500
500
GND
6V
Figure 1. ZO = 50
ΩΩ
ΩΩ
Ω
to VCC/2, CL = 10pF
The capacitor value for ac termination is determined by the operating frequency. For very
low frequencies a higher capacitor value should be selected.
Figure 3. CL = 30pF Circuit
ENABLE AND DISABLE TIME
SWITCH POSITION
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Figure 3. CL = 50pF Circuit
Figure 2. ZO = 50
ΩΩ
ΩΩ
Ω
AC Termination, CL = 10pF
Test Switch
Disable LOW 6V
Enable LOW
Disable HIGH GND
Enable HIGH
TEST CIRCUITS
Figure 5. Enable and Disable Time Circuit

74FCT3807QGI8

Mfr. #:
Manufacturer:
IDT
Description:
Clock Drivers & Distribution 3.3V 1:10 Clock Driver
Lifecycle:
New from this manufacturer.
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