© 2002 Fairchild Semiconductor Corporation DS500486 www.fairchildsemi.com
June 2001
Revised February 2002
GTLP2T152 2-Bit LVTTL/GTLP Transceiver
GTLP2T152
2-Bit LVTTL/GTLP Transceiver
General Description
The GTLP2T152 is a 2-bit transceiver that provides LVTTL-
to-GTLP signal level translation. Data directional control is
handled with a transmit/receive pin. High-speed backplane
operation is a direct result of GTLP’s reduced output swing
(
<1V), reduced input threshold levels and output edge rate
control. The edge rate control minimizes bus-settling time.
GTLP is a Fairchild Semiconductor derivative of the Gun-
ning Transistor logic (GTL) JEDEC standard JESD8-3.
Fairchild’s GTLP has internal edge-rate control and is pro-
cess, voltage and temperature compensated. GTLP’s I/O
structure is similar to GTL and BTL but offers different out-
put levels and receiver threshold. Typical GTLP output volt-
age levels are: V
OL
= 0.5V, V
OH
= 1.5V, and V
REF
= 1V.
Features
■ Bidirectional interface between GTLP and LVTTL logic
levels
■ Designed with edge rate control circuitry to reduce out-
put noise on the GTLP port
■ V
REF
pin provides external supply reference voltage for
receiver threshold adjustibility
■ Special PVT compensation circuitry to provide consis-
tent performance over variations of process, supply volt-
age and temperature
■ TTL compatible driver and control inputs
■ Designed using Fairchild advanced BiCMOS technology
■ Bushold data inputs on A port to eliminate the need for
external pull-up resistors for unused inputs
■ Power up/down and power off high impedance for live
insertion
■ Open drain on GTLP to support wired-or connection
■ Flow through pinout optimizes PCB layout
■ A Port source/sink
−24mA/+24mA
■ B Port sink
+50mA
Ordering Code:
Pin Descriptions Connection Diagrams
US8
SOIC
Order Number Package Number Package Description
GTLP2T152M M08A 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
[TUBE]
GTLP2T152MX M08A 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
[TAPE and REEL]
GTLP2T152K8X MAB08A
(Preliminary)
8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide
[TAPE and REEL]
Pin Names Description
T/R
LVTTL Direction Control
(Receive Direction is Active LOW)
V
CC
, GND, V
REF
Device Supplies
A
n
A Port LVTTL Input/Output
B
n
B Port GTLP Input/Output