MP1906—80V, HALF-BRIDGE, GATE DRIVER
MP1906 Rev. 1.0 www.MonolithicPower.com 9
1/3/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
OPERATION
Switch Shoot-through Protection
The input signals of HPWM and LPWM are
independently controlled. Input shoot-through
protection circuitry prevents shoot-through
between the TG and BG outputs. Only one of
the FET drivers can be on at one time. If HPWM
is high and LPWM is low, both TG and BG are
OFF.
Under Voltage Lockout
When V
CC
or V
BT
goes below their respective
UVLO threshold, both BG and TG outputs will go
low to both FETS. Once V
CC
and V
BT
rises above
the UVLO threshold, both TG and BG will stay
low until there is a rising edge on either HPWM
or LPWM.
Figure 3 shows the operation of the TG and BG
under different HPWM and LPWM and UVLO
conditions.
HPWM
TG
BG
LPWM
Figure 3: Input/Output Timing Diagram
