19
LTC1292/LTC1297
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is reduced. The typical performance characteristics
curve of Noise Error vs Reference Voltage shows the
LSB contribution of this 200µV of noise.
For operation with a 5V reference, the 200µV noise is
only 0.16LSB peak-to-peak. Here the LTC1292/LTC1297
noise will contribute virtually no uncertainty to the
output code. For reduced references, the noise may
become a significant fraction of an LSB and cause
undesirable jitter in the output code. For example, with
a 1.25V reference, this 200µV noise is 0.64LSB peak-
to-peak. This will reduce the range of input voltages
over which a stable output code can be achieved by
0.64LSB. Now, averaging readings may be necessary.
This noise data was taken in a very clean test fixture.
Any setup induced noise (noise or ripple on V
CC
, V
REF
or V
IN
) will add to the internal noise. The lower the
reference voltage used, the more critical it becomes to
have a noise-free setup.
Gain Error Due to Reduced V
REF
The gain error of the LTC1292/LTC1297 is very good
over a wide range of reference voltages. The error
component that is seen in the typical performance
characteristics curve Change in Gain Error vs Refer-
ence Voltage is due to the voltage drop on the GND pin
from the device to the ground plane. To minimize this
error the LTC1292/LTC1297 should be soldered di-
rectly onto the PC board. The internal reference point
for V
REF
is tied to GND. Any voltage drop in the GND pin
will make the reference voltage, internal to the device,
less than what is applied externally (Figure 19). This
drop is typically 420µV due to the product of the pin
resistance (R
PIN
) and the LTC1292/LTC1297 supply
U
S
A
O
PP
L
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AT
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This is the effective number of bits (ENOB). For the
example shown in Figures 20a and 20b, N = 11.8 bits
and 9.9 bits, respectively. Figure 21 shows a plot of
ENOB as a function of input frequency. The 2nd har-
monic distortion term accounts for the degradation of
the ENOB as f
IN
approaches f
S
/2.
Figure 22 shows an FFT plot of the output spectrum for
two tones applied to the input of the A/D. Nonlinearities
in the A/D will cause distortion products at the sum and
difference frequencies of the fundamentals and prod-
ucts of the fundamentals. This is classically referred to
as intermodulation distortion (IMD).
LTC1292
LTC1297
REF+
R
PIN
I
CC
DAC
REF–
V
REF
GND
LTC1292/7 F19
±
REFERENCE
VOLTAGE
current. For example, with V
REF
= 1.25V this will result
in a gain error change of –1.0LSB from the gain error
measured with V
REF
= 5V.
LTC1292 AC Characteristics
Two commonly used figures of merit for specifying the
dynamic performance of the A/Ds in digital signal
processing applications are the Signal-to-Noise Ratio
(SNR) and the “Effective Number of Bits (ENOB).” SNR
is the ratio of the RMS magnitude of the fundamental to
the RMS magnitude of all the non-fundamental signals
up to the Nyquist frequency (half the sampling fre-
quency). The theoretical maximum SNR for a sine wave
input is given by:
SNR = (6.02N + 1.76dB)
where N is the number of bits. Thus the SNR depends
on the resolution of the A/D. For an ideal 12-bit A/D the
SNR is equal to 74dB. Fast Fourier Transform (FFT)
plots of the output spectrum of the LTC1292 are shown
in Figures 20a and 20b. The input (f
IN
) frequencies are
1kHz and 28kHz with the sampling frequency (f
S
) at
58.8 kHz. The SNRs obtained from the plots are 73.0dB
and 61.5dB.
By rewriting the SNR expression it is possible to obtain
the equivalent resolution based on the SNR measure-
ment.
N
SNR dB
=
–.
.
176
602
Figure 19. Parasitic Resistance in GND Pin
20
LTC1292/LTC1297
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Figure 20a. f
IN
= 1kHz, f
S
= 58.8kHz, SNR = 73.0dB
Figure 20b. f
IN
= 28kHz, f
S
= 58.8kHz, SNR = 61.5dB
Figure 21. LTC1292 ENOB vs Input Frequency
Figure 22. f
IN1
= 5.1kHz, f
IN2
= 5.6kHz, f
S
= 58.8kHz
Overvoltage Protection
Applying signals to the LTC1292/LTC1297’s analog
inputs that exceed the positive supply or that go below
ground will degrade the accuracy of the A/D and possi-
bly damage the devices. For example this condition
would occur if a signal is applied to the analog inputs
before power is applied to the LTC1292/LTC1297. An-
other example is the input source is operating from
different supplies of larger value than the LTC1292/
LTC1297. These conditions should be prevented either
with proper supply sequencing or by use of external
circuitry to clamp or current limit the input source.
There are two ways to protect the inputs. In Figure 23
diode clamps from the inputs to V
CC
and GND are used.
The second method is to put resistors in series with the
analog inputs for current limiting. Limit the current to
15mA per channel. The +IN input can accept a resistor
value of 1k but the –IN input cannot accept more than
250 when clocked at its maximum clock frequency of
1MHz. If the LTC1292/LTC1297 are clocked at the
maximum clock frequency and 250 is not enough to
current limit the input source, then the clamp diodes are
recommended (Figures 24a and 24b). The reason for
the limit on the resistor value is that the MSB bit test is
affected by the value of the resistor placed at the –IN
input (see discussion on Analog Inputs and the typical
performance characteristics Maximum CLK Frequency
vs Source Resistance).
FREQUENCY (kHz)
0
–60
–40
–20
15 25
LTC1292/7 F20a
–80
–100
510
20 30
–120
–140
MAGNITUDE (dB)
0
FREQUENCY (kHz)
0
–60
–40
–20
15 25
LTC1292/7 F22
–80
–100
510
20 30
–120
–140
MAGNITUDE (dB)
0
FREQUENCY (kHz)
0
–60
–40
–20
15 25
LTC1292/7 F20b
–80
–100
510
20 30
–120
–140
MAGNITUDE (dB)
0
FREQUENCY (kHz)
0
EFFECTIVE NUMBER OF BITS
9.5
10.0
10.5
60
100
LT1292/7 F21
9.0
8.5
8.0
20 40 80
11.0
11.5
12.0
f
S
= 58.8kHz
21
LTC1292/LTC1297
12927fb
If V
CC
and V
REF
are not tied together, then V
CC
should
be turned on first, then V
REF
. If this sequence cannot be
met, connecting a diode from V
REF
to V
CC
is recom-
mended (see Figure 25).
Because a unique input protection structure is used on
the digital input pins, the signal levels on these pins can
exceed the device V
CC
without damaging the device.
U
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Figure 26. “Quick Look” Circuit for the LTC1292
5V
LTC1292/7 F23
1N4148 DIODES
V
CC
CLK
D
OUT
V
REF
CS
+IN
–IN
GND
LTC1292
LTC1297
5V
LTC1292/7 F24
1N4148 DIODES
1k
V
CC
CLK
D
OUT
V
REF
CS
+IN
–IN
GND
LTC1292
LTC1297
Figure 24b. Overvoltage Protection with
Diode Clamps and Current Limiting Resistor
Figure 23. Overvoltage Protection with Clamp Diodes
5V
LTC1292/7 F25
1N4148
5V
V
CC
CLK
D
OUT
V
REF
CS
+IN
–IN
GND
LTC1292
LTC1297
Figure 25. Separate V
CC
and V
REF
Supplies
5V
LTC1292/7 F24a
250
1k
V
CC
CLK
D
OUT
V
REF
CS
+IN
–IN
GND
LTC1292
LTC1297
Figure 24a. Overvoltage Protection with
Current Limiting Resistors
TO OSCILLOSCOPE
CD4520
LTC1292/7 F26
Q1
RESET
V
DD
EN
CLK
Q2
Q3
Q4
0.1µF
V
IN
f/32
+5V
CLOCK IN
1MHz
22µF
CLK
EN
Q2
Q3
Q4
V
SS
Q1
RESET
V
CC
CLK
D
OUT
V
REF
CS
+IN
–IN
GND
LTC1292

LTC1292DIN8#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 12-Bit Serial I/O Diff Input ADC
Lifecycle:
New from this manufacturer.
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