670M-01ILFT

ICS670-01
LOW PHASE NOISE ZERO DELAY BUFFER AND MULTIPLIER ZDB AND MULTIPLIER
IDT®
LOW PHASE NOISE ZERO DELAY BUFFER AND MULTIPLIER 4
ICS670-01 REV L 012315
AC Electrical Characteristics
VDD = 3.3V ±10%, Ambient Temperature -40 to +85C, unless stated otherwise
Note 1: Rising edge of ICLK compared with rising edge of CLK2, with FBCLK connected to FBIN, and
15 pF load on CLK2. See graph on page 5 for skew vs. frequency and loading.
Thermal Characteristics
Parameter Symbol Conditions Min. Typ. Max. Units
Input Clock Frequency f
IN
See table on page 2 5 160 MHz
Output Clock Frequency 160 MHz
PLL Stabilization Time t
STAB
Input frequency 5 MHz to 160 MHz 4 10 µs
Output Rise Time t
OR
0.8 to 2.0 V, no load 1.5 ns
Output Fall Time t
OF
2.0 to 0.8 V, no load 1.5 ns
Output Clock Duty Cycle t
DC
measured at VDD/2 45 50 55 %
Input to Output Skew Note 1 ±100 ps
Maximum Absolute Jitter short term ±45 ps
Maximum Jitter one sigma 15 ps
Phase Noise, relative to
carrier, 125 MHz (x5)
100 Hz offset -110 dBc/Hz
1 kHz offset -122 dBc/Hz
10 kHz -124 dBc/Hz
200 kHz -117 dBc/Hz
Parameter Symbol Conditions Min. Typ. Max. Units
Thermal Resistance Junction to
Ambient
JA
Still air 120 C/W
JA
1 m/s air flow 115 C/W
JA
3 m/s air flow 105 C/W
Thermal Resistance Junction to Case
JC
58 C/W
ICS670-01
LOW PHASE NOISE ZERO DELAY BUFFER AND MULTIPLIER ZDB AND MULTIPLIER
IDT®
LOW PHASE NOISE ZERO DELAY BUFFER AND MULTIPLIER 5
ICS670-01 REV L 012315
Figure 1. Skew from ICLK to CLK2, with change in load capacitance (VDD = 3.3V)
Adjusting Input/Output Skew
The data in Figure 1 can be used to adjust individual circuit characteristics and achieve the minimum possible skew
between ICLK and CLK2. With a 125 MHz output, for example, having a total load capacitance of 15 pF will result
in nearly zero skew between ICLK and CLK2. Note that the load
capacitance includes board trace capacitance, input capacitance of the load being driven by the ICS670-01, and
any additional capacitors connected to CLK2.
Figure 2. Phase Noise for 125 MHz output, 25 MHz clock input (VDD = 3.3V)
-400
-300
-200
-100
0
100
200
300
25 50 75 100 125 150
CLK2 Frequency (MHz)
Skew (ps)
Skew (ps) 20 pF Skew (ps) 10 pF
ICS670 Phase noise
-140
-120
-100
-80
-60
-40
-20
0
10.E+0 100.E+0 1.E+3 10.E+3 100.E+3 1.E+6 10.E+6
offset frequency
L(f) dBc
ICS670-01
LOW PHASE NOISE ZERO DELAY BUFFER AND MULTIPLIER ZDB AND MULTIPLIER
IDT®
LOW PHASE NOISE ZERO DELAY BUFFER AND MULTIPLIER 6
ICS670-01 REV L 012315
Package Outline and Package Dimensions (16-pin SOIC, 150 Mil. Narrow Body)
Package dimensions are kept current with JEDEC Publication No. 95
Ordering Information
"LF" suffix to the part number denotes Pb-Free configuration, RoHS compliant.
While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes no responsibility
for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses
are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range,
high reliability, or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to
change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical
instruments.
Revision History
Part / Order Number Marking Shipping Packaging Package Temperature
670M-01LF 670M-01LF Tubes 16-pin SOIC 0 to +70 C
670M-01LFT 670M-01LF Tape and Reel 16-pin SOIC 0 to +70 C
670M-01ILF 670M-01ILF Tubes 16-pin SOIC -40 to +85 C
670M-01ILFT 670M-01ILF Tape and Reel 16-pin SOIC -40 to +85 C
INDEX
AREA
1 2
16
D
E
SEATING
PLANE
A1
A
e
- C -
B
.10 (.004)
C
C
L
H
h x 45
Millimeters Inches
Symbol Min Max Min Max
A 1.35 1.75 .0532 .0688
A1 0.10 0.25 .0040 .0098
B 0.330.51.013.020
C 0.19 0.25 .0075 .0098
D 9.80 10.00 .3859 .3937
E 3.80 4.00 .1497 .1574
e 1.27 BASIC 0.050 BASIC
H 5.80 6.20 .2284 .2440
h 0.250.50.010.020
L 0.401.27.016.050
0 8 0 8
Rev. Date Originator Description of Change
L 01/23/15 RDW Updated AC characterization table with new parameter "PLL Stabilization Time".

670M-01ILFT

Mfr. #:
Manufacturer:
IDT
Description:
Clock Buffer LOW NOISE ZERO DELAY BUFFER / MULTIPLIER
Lifecycle:
New from this manufacturer.
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