TS88915TVW100 Datasheet TS88915TVW100, TS88915TMR70, TS88915TMW70 | P10-P12

TS88915T

2122A–HIREL–06/02

5. A 1 MΩ resistor tied to either Analog V

or Analog GND as shown in Figure 5 is

required to ensure no jitter is present on the TS88915T outputs. This technique

causes a phase offset between the SYNC input and the output connected to the

FEEDBACK input, measured at the input pins. The T

spec describes how this

offset varies with process, temperature and voltage. The specs are arrived at by

measuring the phase relationship for the 14 lots described in Note 1 while the

part was in phase-locked operation. The actual measurements are made with 10

MHz SYNC input (1.0 ns edge rate from 0.8V - 2.0V) with the Q/2 output feed

back. The phase measurements are made at 1.5V. The Q/2 output is terminated

at the FEEDBACK input with 100Ω to V

and 100Ω to GND.

Figure 6. Depiction of the Fixed SYNC to Feedback Offset (t

) Which is Present When a 1 MΩ Resistor is Tied to V

or GND

6. The t

SKEWr

specification guarantees that the rising edges of outputs Q/2, Q0, Q1,

Q2, Q3 and Q4 will always fall within a 500 ps window within one part. However,

if the relative position of each output within this window is not specified, the

500 ps window must be added to each side of the t

specification limits to cal-

culate the total part-to-part skew. For this reason the absolute distribution of

these outputs is provided in Table 4. When taking the skew data, Q0 was used

as a reference, so all measurements are relative to this output. The information

in Table 4 is derived from measurements taken from the 14 process lots

described in Note 1, over the temperature and voltage range.

EXTERNAL LOOP

FILTER

RC1

330Ω

C10.1 µF

ANALOG GND

1 MΩ

REFERENCE

RESISTOR

1 MΩ

REFERENCE

RESISTOR

RC1

330Ω

0.1 µF

SYNC INPUT

FEEDBACK OUTPUT

3.0V

5.0V

2.25 ns OFFSET

SYNC INPUT

FEEDBACK OUTPUT

-0.775 ns OFFSET

3.0V

5.0V

With the 1 MΩ resistor tied in this fashion, the t

specification measured at the input pins is:

= 2.25 ns ± 1.0 ns

With the 1 MΩ resistor tied in this fashion, the t

specification measured at the input pins is:

= -0.775 ns ± 0.275 ns

TS88915T

2122A–HIREL–06/02

7. Calculation of Total Output-to-Output skew Between Multiple Parts (Part-to-Part

Skew)

By combining the t

specification and the information in Note 5, the worst case

Output-to-Output skew between multiple TS88915’s connected in parallel can be

calculated. This calculation assumes that all parts have a common SYNC input

clock with equal delay that input signal to each part. This skew value is valid at

the TS88915 output pins only (equally loaded), it does not include PCB trace

delays due to varying loads.With a 1 MΩ resistor tied to analog VCC as shown in

Note 4, the t

spec. limits between SYNC and the Q/2 output (connected to the

FEEDBACK pin) are -1.05 ns and -0.5 ns. To calculate the skew of any given

output between two or more parts, the absolute value of the distribution of that

output given in Table 4 must be subtracted and added to the lower and upper t

spec limits respectively. For output Q2, [276-(-44)] = 320 ps is the absolute value

of the distribution. Therefore [-1.05 - 0.32] = -1.37 ns is the lower t

limit, and [-

0.5 + 0.32] = -0.18 ns is the upper limit. Therefore the worst case skew of output

Q2 between any number of part is [(-1.37)-(-0.18)] = 1.19 ns. Q2 has the worst

case skew distribution of any output, so 1.2 ns is the absolute worst case Out-

put-to-Output skew between multiple parts.

8. Note 4 explains that the t

specification was measured and is guaranteed for

the configuration of the Q/2 output connected to the FEEDBACK pin and the

SYNC input running at 10 MHz. The fixed offset (t

) as described above has

some dependence on the input frequency and what frequency the VCO is run-

ning. The graphs of Figure 6 demonstrate this dependence. The data presented

in Figure 6 is from devices representing process extremes, and the measure-

ments were also taken at the voltage extremes (V

= 5.25V and 4.75V).

Therefore the data in Figure 6 is a realistic representation of the variation of t

Table 4. Relative Position of Outputs Q/2, Q0-Q4, 2X_Q,Within the 500 ps t

SKEWr

Spec

Window

Output

(ps)

Q/2

2X_Q

-72

-44

-40

-274

-16

-633

275

255

-34

250

-35

TS88915T

2122A–HIREL–06/02

Figure 7.

9. The Lock indicator pin (LOCK) will reliably indicate a phase-locked condition at

SYNC input frequencies down to 10 MHz. At frequencies below 10 MHz, the fre-

quency of correction pulses going into the phase detector from the SYNC and

FEEDBACK pins may not be sufficient to allow the lock indicator circuitry to

accurately predict a phase-locked condition. The TS88915T is guaranteed to

provide stable phase-locked operation down to the appropriate minimum input

frequency given in Table 3, even though the LOCK pin may be low at frequen-

cies below 10 MHz.

Timing Notes 1. The TS88915T aligns rising edges of the FEEDBACK input and the SYNC input,

therefore the SYNC input does not require a 50% duty cycle.

2. All skew specs are measured between V

/2 crossing point of the appropriate

output edges. All skews are specified as ‘windows’, not as a “deviation around a

center point”.

3. If a “Q” output is connected to the FEEDBACK input (this situation is not shown),

the “Q” output frequency would match the SYNC input frequency, the 2X_Q out-

tPD versus Frequency for Q/2 output feed back,

including process and voltage variation at 25°C

(with 1 MΩ resistor tied to analog VCC)

tPD versus Frequency for Q4 output feed back,

including process and voltage variation at 25°C

(with 1 MΩ resistor tied to analog VCC)

tPD versus Frequency for Q/2 output feed back,

including process and voltage variation at 25°C

(with 1 MΩ resistor tied to analog GND)

tPD versus Frequency for Q4 output feed back,

including process and voltage variation at 25°C

(with 1 MΩ resistor tied to analog GND)

3.5

3.0

2.5

2.0

1.5

1.0

0.5

2.5 5.0 7.5 10.0 12.5 15.0 17.5

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0 5 10 15 20

tPD

SYNC to

FEEDBACK

(ns)

tPD

SYNC to

FEEDBACK

(ns)

tPD

SYNC to

FEEDBACK

(ns)

tPD

SYNC to

FEEDBACK

(ns)

-0.50

-0.75

-1.00

-1.25

-1.50

-0.50

-1.00

-1.50

-2.00

2.5 5.0 7.5 10 12.5 15 17.5 20 22.5 25 27.5

SYNC INPUT FREQUENCY (MHz) SYNC INPUT FREQUENCY (MHz)

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P19

TS88915TVW100

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TS88915TVW100

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