MAX8505
Current Limit
The MAX8505 offers both high-side and low-side
current limits. The high-side current limit monitors the
inductor peak current and the low-side current limit
monitors the inductor valley current. Current-limit thresh-
olds are 6A (typ) for high side and 3.8A (typ) for low
side. If the output inductor current exceeds the high-
side current limit during its on-time, the high-side MOS-
FET turns off and the synchronous rectifier turns on. The
inductor current is continuously monitored during the
on-time of the low-side MOSFET. If the inductor current
is still above the low-side current limit at the moment of
the next clock cycle, the high-side MOSFET is not
turned on and the low-side MOSFET is kept on to contin-
ue discharging the output inductor current. Once the
inductor current is below the low-side current limit, the
high-side MOSFET is turned on at the next clock cycle.
If the inductor current stays less than the high-side cur-
rent limit during the minimum on duty ratio, the normal
operation resumes at the next clock cycle. Otherwise,
the current-limit operation continues.
V
CC
Decoupling
Due to the high switching frequency and tight output
tolerance (1%), decouple V
CC
from IN with a 10
resistor and bypass to GND with a 0.1µF capacitor.
Place the capacitor as close to V
CC
as possible.
Bootstrap (BST)
Gate-drive voltage for the high-side N-channel switch is
generated by a bootstrapped capacitor boost circuit.
The bootstrapped capacitor is connected between the
BST pin and LX. When the low-side N-channel MOSFET
is on, it forces LX to ground and charges the capacitor
to V
IN
through diode D1. When the low-side N-channel
MOSFET turns off and the high-side N-channel MOSFET
turns on, LX is pulled to V
IN
. D1 prevents the capacitor
from discharging into V
IN
and the voltage on the boot-
strapped capacitor is boosted above V
IN
. This provides
the necessary voltage for the high driver. A Schottky
diode should be used for D1.
Frequency Selection/Enable (CTL)
The MAX8505 includes a frequency selection circuit to
allow it to run at 500kHz or 1MHz. The operating fre-
quency is selected through a control input, CTL, which
has three input threshold ranges that are ratiometric to
the input supply voltage. When CTL is driven to GND, it
acts like an enable pin, switching the output off. When
the CTL input is driven to >0.8 V
CC
, the MAX8505 is
enabled with 1MHz switching. When the CTL input is
between 0.55 V
CC
and 0.7 V
CC
, the part operates
at 500kHz. When the CTL input is <0.45 x V
CC
, the
device is in shutdown.
Soft-Start
To reduce input transient currents during startup, a pro-
grammable soft-start is provided. The soft-start time is
given by:
A minimum capacitance of 0.01µF at REF is recom-
mended to reduce the susceptibility to switching noise.
Power-OK (POK)
The MAX8505 also includes an open-drain POK output
that indicates when the regulator output is within ±12%
of its nominal output. If the output voltage moves
outside this range, the POK output is pulled to ground.
Since this comparator has no hysteresis on either
threshold, a 50µs delay time is added to prevent the
POK output from chattering between states. The POK
should be pulled to V
IN
or another supply voltage less
than 5.5V through a resistor.
UVLO
If V
CC
drops below +2.25V, the UVLO circuit inhibits
switching. Once V
CC
rises above +2.35V, the UVLO
clears, and the soft-start sequence activates.
Thermal Protection
Thermal-overload protection limits total power dissipa-
tion in the device. When the junction temperature
exceeds T
J
= +170°C, a thermal sensor forces the
device into shutdown, allowing the die to cool. The ther-
mal sensor turns the device on again after the junction
temperature cools by 20°C, resulting in a pulsed output
during continuous overload conditions. Following a
thermal-shutdown condition, the soft-start sequence
begins anew.
Design Procedure
Duty Cycle
The equation below shows how to calculate the result-
ing duty cycle when series losses from the inductor and
internal switches are accounted for:
where V
OUT
= output voltage; V
IN
= input voltage;
I
OUT
= output current (3A maximum); R
L
= ESR of the
inductor; R
NHS
= on-resistance of the high-side switch;
and R
NLS
= on-resistance of the low-side switch.
D
VIRR
VI R R
VIRR
V
if R R
OUT OUT NLS L
IN OUT NLS NHS
OUT OUT NLS L
IN
NLS NHS
=
++
+−
=
++
=
()
()
()
tC
V
A
SOFT START REF_
.
µ
08
25
3A, 1MHz, 1% Accurate, Internal Switch
Step-Down Regulator with Power-OK
10 ______________________________________________________________________________________
Output Voltage Selection
The output voltage of the MAX8505 can be adjusted
from 0.8V to 85% of the input voltage at 500kHz or up
to 80% of the input voltage at 1MHz. This is done by
connecting a resistive-divider (R2 and R3) between the
output and the FB pin (see the
Typical Operating
Circuit
). For best results, keep R3 below 50k and
select R2 using the following equation:
where V
REF
= 0.8V.
Inductor Design
When choosing the inductor, the key parameters are
inductor value (L) and peak current (I
PEAK
). The
following equation includes a constant, denoted as LIR,
which is the ratio of peak-to-peak inductor AC current
(ripple current) to maximum DC load current. A higher
value of LIR allows smaller inductance but results in
higher losses and ripple. A good compromise between
size and losses is found at approximately 20% to 30%
ripple-current to load-current ratio (LIR = 0.20 to 0.30):
where f
S
is the switching frequency and
Choose an inductor with a saturation current at least as
high as the peak inductor current. Additionally, verify
the peak inductor current does not exceed the current
limit. The inductor selected should exhibit low losses at
the chosen operating frequency.
Output Capacitor Design and Output Ripple
The key selection parameters for the output capacitor
are capacitance, ESR, ESL, and the voltage rating
requirements. These affect the overall stability, output
ripple voltage, and transient response of the DC-DC
converter. The output ripple occurs due to variations in
the charge stored in the output capacitor, the voltage
drop due to the capacitor’s ESR, and the voltage drop
due to the capacitor’s ESL. Calculate the output voltage
ripple due to the output capacitance, ESR, and ESL as:
where the output ripples due to output capacitance,
ESR, and ESL are:
or, whichever is greater.
The ESR is the main contribution to the output voltage
ripple.
I
P-P
, the peak-to-peak inductor current, is:
Use these equations for initial capacitor selection,
but determine final values by testing a prototype or
evaluation circuit. As a rule, a smaller ripple current
results in less output voltage ripple. Since the inductor
ripple current is a factor of the inductor value, the
output voltage ripple decreases with larger inductance.
Use ceramic capacitors for their low ESR and ESL at the
switching frequency of the converter. The low ESL of
ceramic capacitors makes ripple voltages negligible.
Load-transient response depends on the selected
output capacitor. During a load transient, the output
instantly changes by ESR I
LOAD
. Before the controller
can respond, the output deviates further, depending on
the inductor and output capacitor values. After a short
time (see Transient Response in the
Typical Operating
Characteristics
), the controller responds by regulating the
output voltage back to its nominal state. The controller
response time depends on the closed-loop bandwidth,
the inductor value, and the slew rate of the transconduc-
tance amplifier. A higher bandwidth yields a faster
response time, thus preventing the output from deviating
further from its regulating value.
I
VV
fL
V
V
PP
IN OUT
S
OUT
IN
=
×
×
()
V
I
t
ESL or
I
t
ESL
RIPPLE ESL
PP
ON
PP
OFF
()
, ×
−−
V I ESR
RIPPLE ESR P P()
V
I
Cf
RIPPLE C
PP
OUT S
()
=
××
8
VV V V
RIPPLE RIPPLE C RIPPLE ESR RIPPLE ESL
=+ +
() ( ) ( )
222
LIR
II
I
PEAK OUT
OUT
2
()
L
VD
I LIR f
OUT
OUT S
=
×−
××
()1
RR
V
V
OUT
REF
23 1
MAX8505
3A, 1MHz, 1% Accurate, Internal Switch
Step-Down Regulator with Power-OK
______________________________________________________________________________________ 11
MAX8505
Input Capacitor Design
The input capacitor reduces the current peaks drawn
from the input power supply and reduces switching
noise in the IC. The impedance of the input capacitor at
the switching frequency should be less than that of the
input source so high-frequency switching currents do
not pass through the input source but instead are
shunted through the input capacitor. A high source
impedance requires larger input capacitance. The
input capacitor must meet the ripple current require-
ment imposed by the switching currents. The RMS
input ripple current is given by:
where I
RIPPLE
is the input RMS ripple current.
Use sufficient input bypass capacitance to ensure that
the absolute maximum voltage rating of the MAX8505 is
not exceeded in any condition. When input supply is
not located close to the MAX8505, a bulk bypass input
capacitor may be needed.
Compensation Design
The double pole formed by the inductor and output
capacitor of most voltage-mode controllers introduces
a large phase shift, which requires an elaborate
compensation network to stabilize the control loop.
The MAX8505 controller utilizes a current-mode control
scheme that regulates the output voltage by forcing
the required current through the external inductor,
eliminating the double pole caused by the inductor
and output capacitor, and greatly simplifying the
compensation network. A simple type 1 compensation
with single compensation resistor (R1) and compensa-
tion capacitor (C8) create a stable and high-bandwidth
loop (see the
Typical Operating Circuit
).
An internal transconductance error amplifier compen-
sates the control loop. Connect a series resistor and
capacitor between COMP (the output of the error amplifi-
er) and GND to form a pole-zero pair. The external
inductor, internal current-sensing circuitry, output capaci-
tor, and external compensation circuit determine the loop
stability. Choose the inductor and output capacitor based
on performance, size, and cost. Additionally, select the
compensation resistor and capacitor to optimize control-
loop stability. The component values shown in the
Typical
Operating Circuit
yield stable operation over a broad
range of input-to-output voltages.
For customized compensation networks that increase
stability or transient response, the simplified loop gain
can be described by the equation:
where:
gm
ERR
(COMP transconductance) = 100µmho
R
OERR
(output resistance of transconductance
amplifier) = 20M
C
COMP
(compensation capacitor at COMP pin)
R
T
(current-sense transresistance) = 0.086
C
PARA
(parasitic capacitance at COMP pin) = 10pF
R
L
(load resistor)
C
OUT
(output capacitor)
R
ESR
(series resistance of C
OUT
)
s = j2πf
In designing the compensation circuit, select an appro-
priate converter bandwidth (f
C
) to stabilize the system
while maximizing transient response. This bandwidth
should not exceed 1/10 of the switching frequency. Use
100kHz as a reasonable starting point. Calculate
C
COMP
based on this bandwidth using the following
equation:
where R2 and R3 are the feedback resistors.
Calculate C
COMP
to cancel out the pole created by R
L
and C
OUT
using the following equation;
CR
C
R
COMP L
OUT
COMP
R
IRRR fC
Vgm
COMP
OUT T C OUT
OUT ER
=
××+×××
×
()322π
RR
R× 3
A
V
V
gm R
sC R
s
VOL
FB
OUT
ERR OERR
COMP COMP
× ×
××+
×
1
(
CCR sCR
R
R
COMP OERR PARA COMP
L
×+××× +
×
11)( )
TT
OUT ESR
OUT L
sC R
sC R
×
××+
××+
1
1
II
VVV
V
RIPPLE LOAD
OUT IN OUT
IN
×−()
2
3A, 1MHz, 1% Accurate, Internal Switch
Step-Down Regulator with Power-OK
12 ______________________________________________________________________________________

MAX8505EEE+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Switching Voltage Regulators 3A 1MHz Step-Down Regulator
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