REV. –12–
AD7226
OFFSET ADJUST
Figure 17 shows how the AD7226 can be used to provide pro-
grammable input offset voltage adjustment for the AD544 op
amp. Each output of the AD7226 can be used to trim the input
offset voltage on one AD544. The 620 kW resistor tied to 10 V
provides a fixed bias current to one offset node. For symmetri-
cal adjustment, this bias current should equal the current in the
other offset node with the half-full scale code (i.e., 10000000)
on the DAC. Changing the code on the DAC varies the bias
current and hence provides offset adjust for the AD544. For
example, the input offset voltage on the AD544J, which has a
maximum of ± 2 mV, can be programmably trimmed to ± 10 mV.
DAC A
V
REF
V
DD
DGND
AGND
V
SS
V
OUT
A
AD7226
*
*
DIGITAL INPUTS OMITTED
FOR CLARITY
620k
500k
+15V
–15V
1
4
5
7
+10V
Figure 17. Offset Adjust for AD544
WR
A1
A0
AD7226
*
ADDRESS/DATA BUS
ADDRESS BUS
ADDRESS
DECODE
WR
EN
DB7
DB0
8212DS2
ALE
D7
D0
A8
A15
*
LINEAR CIRCUITRY OMITTED FOR CLARITY
8085A
Figure 18. AD7226 to 8085A Interface
WR
A1
A0
AD7226
*
DATA BUS
ADDRESS BUS
ADDRESS
DECODE
R/W
EN
DB7
DB0
D7
D0
A0
A15
*
LINEAR CIRCUITRY OMITTED FOR CLARITY
EN
E
6809
Figure 19. AD7226 to 6809 Interface
WR
A1
A0
AD7226
*
DATA BUS
ADDRESS BUS
ADDRESS
DECODE
R/W
EN
DB7
DB0
D7
D0
A0
A15
*
LINEAR CIRCUITRY OMITTED FOR CLARITY
EN
2
6502
Figure 20. AD7226 to 6502 Interface
WR
A1
A0
AD7226
*
DATA BUS
ADDRESS BUS
ADDRESS
DECODE
WR
EN
DB7
DB0
D7
D0
A0
A15
*
LINEAR CIRCUITRY OMITTED FOR CLARITY
Z-80
Figure 21. AD7226 to Z-80 Interface
