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P5P2308AF-1H16SR

P1-P3P4-P6P7-P9P10-P11
ASM5P2308A
http://onsemi.com
4
Table 4. ABSOLUTE MAXIMUM RATINGS
Parameter
Min
Max Unit
Supply Voltage to Ground Potential
−0.5
+4.6
V
DC Input Voltage (Except REF)
−0.5
V
DD
+ 0.5
V
DC Input Voltage (REF)
−0.5
7
V
Storage Temperature
−65
+150 °C
Max. Soldering Temperature (10 sec)
260 °C
Junction Temperature
150 °C
Static Discharge Voltage (As per JEDEC STD22− A114−B)
2000
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 5. OPERATING CONDITIONS
Parameter
Description
Min
Max
Unit
V
DD
Supply Voltage 3.0 3.6
V
T
A
Operating Temperature
(Ambient Temperature)
Commercial temperature
0
70
°C
Industrial temperature −40 85
C
L
Load Capacitance, below 100 MHz
30
pF
C
L
Load Capacitance, from 100 MHz to 133 MHz
15
pF
C
IN
Input Capacitance (Note 6)
7
pF
6. Applies to both Ref Clock and FBK.
Table 6. ELECTRICAL CHARACTERISTICS
Parameter Description Test
Conditions
Min Max Unit
V
IL
Input LOW Voltage
0.8
V
V
IH
Input HIGH Voltage
2.2
V
I
IL
Input LOW Current V
IN
= 0 V
50
�-t
A
I
IH
Input HIGH Current
V
IN
= V
DD
100
�-t
A
V
OL
Output LOW Voltage
(Note 7)
I
OL
= 8 mA (−1, −2, −3, −4)
I
OL
= 12 mA (−1H, −5H)
0.4
V
V
OH
Output HIGH Voltage
(Note 7)
I
OH
= −8 mA (−1, −2, −3, −4)
I
OH
= −12 mA (−1H, −5H)
2.4
V
I
DD
Supply Current
(Note 8)
Unloaded outputs at 100 MHz,
Select inputs at V
DD
or GND
(−1, −1H, −
2,
−
3,
−4)
Commercial temp.
40
mA
Industrial temp.
45
Unloaded outputs; 100 MHz
REF, Select inputs at V
DD
or
GND (−5H)
Commercial temp.
30
Industrial temp.
35
Unloaded outputs at 66 MHz
Commercial temp.
32
Industrial temp.
34
Unloaded outputs at 33 MHz
Commercial temp.
18
Industrial temp.
20
7. Parameter is guaranteed by design and characterization. Not 100% tested in production.
8. Supply Currents are measured for PLL−Driven Mode (S2 = 1, S1 = 1).
ASM5P2308A
http://onsemi.com
5
Table 7. SWITCHING CHARACTERISTICS (For all measurements use Test Circuit #1.) (Note 9)
Parameter Test
Conditions
Min Typ Max Unit
Output Frequency
(Refer to ASM5P2308A
Configurations Table)
30 pF load
( −1, −1H)
10
100
MHz
(−2) 12
100
(−3) 15
100
(−4)
20
100
(−5H) 5
66.67
15 pF load
( −1, −1H) 10
133
MHz
(−2)
12
133
(−3) 15
133
(−4)
20
133
Duty Cycle (Note 10)
(−1, −2, −3, −4, −1H, −5H)
Measured at 1.4 V, F
OUT
≤ 66.66 MHz, 30 pF load 40 50 60 %
Duty Cycle (Note 10)
(−1, −2, −3, −4, −1H, −5H)
Measured at 1.4 V, F
OUT
≤ 50 MHz, 15 pF load 45 50 55 %
Output Rise Time (Note 10)
(−1, −2, −3, −4)
Measured between 0.8 V
and 2.0 V, 30 pF load
Commercial temp.
2.2
nS
Industrial temp.
2.5
Output Rise Time (Note 10)
(−1, −2, −3, −4)
Measured between 0.8 V
and 2.0 V, 15 pF load
Commercial temp.,
Industrial temp.
1.5
nS
Output Rise Time (Note 10)
(−1H, −5H)
Measured between 0.8 V
and 2.0 V, 30 pF load
1.5 2 nS
Output Fall Time (Note 10)
(−1, −2, −3, −4)
Measured between 2.0 V
and 0.8 V, 30 pF load
Commercial temp.
2.2
nS
Industrial temp.
2.5
Output Fall Time (Note 10)
(−1, −2, −3, −4)
Measured between 2.0 V
and 0.8 V, 15 pF load
Commercial temp.,
Industrial temp.
1.5 nS
Output Fall Time (Note 10)
(−1H, −5H)
Measured between 2.0 V
and 0.8 V, 30 pF load
1.25 1.5 nS
Output−to−output skew on same bank (Note 10)
(−1, −2, −3, −4)
All outputs equally loaded
200 pS
Output−to−output skew (Note 10) (−1H, −5H)
All outputs equally loaded
200 pS
Output bank A −to− output Bank B skew (Note 10)
(−1, −4, −5H)
All outputs equally loaded
200 pS
Output bank A −to− output
Bank B skew (Note 10) (−2, −3)
All outputs equally loaded
400 pS
Delay, REF Rising Edge to FBK
Rising Edge (Notes 10, 11)
Measured at V
DD
/2
0 ±250
pS
Device−to−Device Skew
(Note 10)
Measured at V
DD
/2 on the FBK pins of the device
0 700
Cycle−to−Cycle Jitter (Note 10)
(−1, −1H, −4, −5H)
Measured at 66.67 MHz, loaded outputs, 15 pF load
200
Measured at 66.67 MHz, loaded outputs, 30 pF load
200
Measured at 133.3 MHz, loaded outputs, 15 pF load
(Note 12)
125
Cycle−to−Cycle Jitter (Note 10)
(−2, −3)
Measured at 66.67 MHz, loaded outputs, 15 pF load
400
Measured at 66.67 MHz, loaded outputs, 30 pF load
PLL Lock Time (Note 10)
Stable power supply, valid clock presented on REF and
FBK pins
1.0
mS
9. All parameters are specified at Commercial and Industrial temperature unless stated otherwise.
10. Parameter is guaranteed by design and characterization. Not 100% tested in production.
11. Refer to Test Circuit #2 *Not applicable for (−1, −2, −1H, −2H).
12. Not applicable for −5H.
ASM5P2308A
http://onsemi.com
6
Switching Waveforms
t
1
t
2
1.4 V 1.4 V 1.4 V
OUTPUT
Figure 3. Duty Cycle Timing
2
V
0.8
V
2 V
0.8 V
VDD
OUTPUT
0
V
t
3
t
4
Figure 4. All Outputs Rise/Fall
T
ime
1.4 V
OUTPUT
1.4
V
OUTPUT
t
5
Figure 5. Output−Output Skew
V
DD
/2
INPUT
FBK
V
DD
/2
t
6
Figure 6. Input−Output Propagation Delay
V
DD
/2
FBK, Device1
FBK, Device2
V
DD
/2
t
7
Figure 7. Device−Device Skew
P1-P3P4-P6P7-P9P10-P11

P5P2308AF-1H16SR

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Buy P5P2308AF-1H16SR
Manufacturer:
ON Semiconductor
Description:
Clock Buffer 10-133MHZ 3.3V 8 O/P ZDB
Lifecycle:
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