PIC12LF1552
DS41642A-page 22 Preliminary 2012 Microchip Technology Inc.
7.3 Checksum Computation
The checksum is calculated by two different methods
dependent on the setting of the CP
Configuration bit.
7.3.1 PROGRAM CODE PROTECTION
DISABLED
With the program code protection disabled, the
checksum is computed by reading the contents of the
program memory locations and adding up the program
memory data starting at address 0000h, up to the
maximum user addressable location. Any Carry bit
exceeding 16 bits are ignored. Additionally, the relevant
bits of the Configuration Words are added to the
checksum. All unimplemented Configuration bits are
masked to ‘0’.
EXAMPLE 7-1: CHECKSUM COMPUTED WITH PROGRAM CODE PROTECTION DISABLED
(CP
= 1), PIC12LF1552, 00AAh AT FIRST AND LAST ADDRESS
TABLE 7-1: CONFIGURATION WORD
MASK VALUES
Device
Config. Word
1 Mask
Config. Word
2 Mask
PIC12LF1552 0EFBh 2E03h
PIC12LF1552 Sum of Memory addresses 0000h-07FFh 7956h
(1)
Configuration Word 1 3FFFh
(2)
Configuration Word 1 mask 0EFBh
(3)
Configuration Word 2 3FFFh
(4)
Configuration Word 2 mask 2E03h
(5)
Checksum = 7956h + (3FFFh and 0EFBh) + (3FFFh and 2E03h)
(6)
= 7956h + 0EFBh + 2E03h
= B654h
Note 1: This value is obtained by taking the total number of program memory locations (0x000 to 0x7FFh which
is 800h) subtracting 2h which yields 7FEh, then multiplying it by the blank memory value of 0x3FFF to
get the sum of 1FF 7802h. Then, truncate to 16 bits the value of 7802h. Now add 00AAh (00AAh +
00AAh) to 7802h to get the final value of B654h.
2: This value is obtained by making all bits of the Configuration Word 1 a ‘1’, then converting it to hex, thus
having a value of 3FFFh.
3: This value is obtained by making all used bits of the Configuration Word 1 a ‘1’, then converting it to hex,
thus having a value of 0EFBh.
4: This value is obtained by making all bits of the Configuration Word 2 a ‘1’, then converting it to hex, thus
having a value of 3FFFh.
5: This value is obtained by making all used bits of the Configuration Word 2 a ‘1’, then converting it to hex,
thus having a value of 2E03h.
6: This value is obtained by ANDing the Configuration Word value with the Configuration Word Mask Value
and adding it to the sum of memory addresses: (3FFFh and 0EFBh) + (3FFFh and 2E03h) + 7956h =
B654h. Then, truncate to 16 bits, thus having a final value of B654h.
2012 Microchip Technology Inc. Preliminary DS41642A-page 23
PIC12LF1552
7.3.2 PROGRAM CODE PROTECTION
ENABLED
With the program code protection enabled, the
checksum is computed in the following manner: The
Least Significant nibble of each user ID is used to
create a 16-bit value. The masked value of user ID
location 8000h is the Most Significant nibble. This sum
of user IDs is summed with the Configuration Words
(all unimplemented Configuration bits are masked to
0’).
EXAMPLE 7-2: CHECKSUM COMPUTED WITH PROGRAM CODE PROTECTION ENABLED
(CP
= 0), PIC12LF1552, 00AAh AT FIRST AND LAST ADDRESS
PIC12LF1552 Configuration Word 1 3F7Fh
(1)
Configuration Word 1 mask 0E7Bh
(2)
Configuration Word 2 3FFFh
(3)
Configuration Word 2 mask 2E03h
(4)
User ID (8000h) 000Eh
(5)
User ID (8001h) 0008h
(5)
User ID (8002h) 0005h
(5)
User ID (8003h) 0008h
(5)
Sum of User IDs = (000Eh and 000Fh) << 12 + (0008h and 000Fh) << 8 +
(0005h and 000Fh) << 4 + (0008h and 000Fh)
(6)
= E000h + 0800h + 0050h + 0008h
= E858h
Checksum = (3F7Fh and 0E7Bh) + (3FFFh and 2E03h) + Sum of User IDs
(7)
= 0E7Bh +2E03h + E858h
= 24D6h
Note 1: This value is obtained by making all bits of the Configuration Word 1 a ‘1’, but the code-protect bit is0
(thus, enabled), then converting it to hex, thus having a value of 3F7Fh.
2: This value is obtained by making all used bits of the Configuration Word 1 a ‘1’, but the code-protect bit
is ‘0’ (thus, enabled), then converting it to hex, thus having a value of 0E7Bh.
3: This value is obtained by making all bits of the Configuration Word 2 a ‘1’, then converting it to hex, thus
having a value of 3FFFh.
4: This value is obtained by making all used bits of the Configuration Word 2 a ‘1’, then converting it to hex,
thus having a value of 2E03h.
5: These values are picked at random for this example; they could be any 16-bit value.
6: In order to calculate the sum of user IDs, take the 16-bit value of the first user ID location (000Eh), AND
the address to (000Fh), thus masking the MSB. This gives you the value 000Eh, then shift left 12 bits,
giving you E000h. Do the same procedure for the 16-bit value of the second user ID location (0008h),
except shift left 8 bits. Also, do the same for the third user ID location (0005h), except shift left 4 bits. For
the fourth user ID location do not shift. Finally, add up all four user ID values to get the final sum of user
IDs of E858h.
7: This value is obtained by ANDing the Configuration Word value with the Configuration Word Mask Value
and adding it to the sum of user IDs: (3F7Fh AND 0E7Bh) + (3FFFh AND 2E03h) + E858h = 24D6h.
PIC12LF1552
DS41642A-page 24 Preliminary 2012 Microchip Technology Inc.
8.0 ELECTRICAL SPECIFICATIONS
Refer to the device specific data sheet for absolute
maximum ratings.
TABLE 8-1: AC/DC CHARACTERISTICS TIMING REQUIREMENTS FOR PROGRAM/VERIFY MODE
AC/DC CHARACTERISTICS
Standard Operating Conditions
Production tested at 25°C
Sym. Characteristics Min. Typ. Max. Units Conditions/Comments
Supply Voltages and Currents
V
DD
VDD Read/Write and Row Erase operations VDDMIN —VDDMAX V
Bulk Erase operations 2.7 V
DDMAX V
I
DDI Current on VDD, Idle 1.0 mA
I
DDP Current on VDD, Programming 3.0 mA
I
PP
VPP
Current on MCLR/VPP ——600A
V
IHH
High voltage on MCLR/VPP for
Program/Verify mode entry
8.0 9.0 V
T
VHHR
MCLR rise time (VIL to VIHH) for
Program/Verify mode entry
——1.0s
I/O pins
V
IH (ICSPCLK, ICSPDAT, MCLR/VPP) input high level 0.8 VDD ——V
V
IL (ICSPCLK, ICSPDAT, MCLR/VPP) input low level 0.2 VDD V
V
OH
ICSPDAT output high level
V
DD-0.7 V
I
OH = 3.5 mA, VDD = 5V
I
OH = 3 mA, VDD = 3.3V
I
OH = 2 mA, VDD = 1.8V
V
OL
ICSPDAT output low level
——0.6V
IOH = 8 mA, VDD = 5V
I
OH = 6 mA, VDD = 3.3V
I
OH = 3 mA, VDD = 1.8V
Programming Mode Entry and Exit
T
ENTS
Programing mode entry setup time: ICSPCLK,
ICSPDAT setup time before V
DD or MCLR
100 ns
T
ENTH
Programing mode entry hold time: ICSPCLK,
ICSPDAT hold time after V
DD or MCLR
250 s
Serial Program/Verify
T
CKL Clock Low Pulse Width 100 ns
T
CKH Clock High Pulse Width 100 ns
T
DS Data in setup time before clock 100 ns
T
DH Data in hold time after clock 100 ns
T
CO
Clock to data out valid (during a
Read Data command)
0—80ns
T
LZD
Clock to data low-impedance (during a
Read Data command)
0—80ns
T
HZD
Clock to data high-impedance (during a
Read Data command)
0—80ns
T
DLY
Data input not driven to next clock input (delay required
between command/data or command/command)
1.0 s
T
ERAB Bulk Erase cycle time 5 ms
T
ERAR Row Erase cycle time 2.5 ms
T
PINT
Internally timed programming operation time
2.5
5
ms
ms
Program memory
Configuration Words
T
PEXT Externally timed programming pulse 1.0 2.1 ms Note 1
T
DIS
Time delay from program to compare
(HV discharge time)
300 s
T
EXIT Time delay when exiting Program/Verify mode 1 s
Note 1: Externally timed writes are not supported for Configuration and Calibration bits.

PIC12LF1552-I/MS

Mfr. #:
Manufacturer:
Microchip Technology
Description:
8-bit Microcontrollers - MCU 3.5KBFlash 256bRAM 6 I/0, 10-Bit ADC
Lifecycle:
New from this manufacturer.
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