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74LVT16652ADL,518

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P22
9397 750 14402 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 12 January 2005 15 of 21
Philips Semiconductors
74LVT16652A
3.3 V 16-bit bus transceiver/register; 3-state
V
OL
is typical voltage output drop that occur with the output load.
Fig 10. 3-state output enable time to LOW-level and output disable time from LOW-level
Remark: The shaded areas indicate when the input is permitted to change for predictable
output performance.
Fig 11. Data set-up and hold times
001aac353
t
PZL
t
PLZ
0 V
V
OL
+ 0.3 V
V
M
V
M
V
M
V
OL
3.0 V or V
CC
0 V
3.0 V or V
CC
nAx or nBx
nOEBA
nOEAB
001aac218
nCPBA or
nCPAB
V
M
V
M
V
M
V
M
V
M
V
M
t
su(H)
t
h(H)
t
su(L)
t
h(L)
3.0 V
or V
CC
3.0 V
or V
CC
0 V
0 V
nAx or nBx
9397 750 14402 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 12 January 2005 16 of 21
Philips Semiconductors
74LVT16652A
3.3 V 16-bit bus transceiver/register; 3-state
V
M
= 1.5 V.
a. Input pulse definition
Test data is given in Table 10.
R
T
= Termination resistance should be equal to output impedance Z
o
of the pulse generator.
C
L
= Load capacitance including jig and probe capacitance.
R
L
= Load resistor.
V
EXT
= Test voltage for switching times.
b. Test circuit
Fig 12. Load circuitry for switching times
Table 10: Test data
Input Load V
EXT
V
I
Repetition
rate
t
W
t
r
, t
f
C
L
R
L
t
PHZ
, t
PZH
t
PLZ
, t
PZL
t
PLH
, t
PHL
2.7 V ≤ 10 MHz 500 ns ≤ 2.5 ns 50 pF 500 Ω GND 6 V open
001aac221
V
M
V
M
t
W
t
W
10 %
90 % 90 %
0 V
V
I
V
I
negative
pulse
positive
pulse
0 V
V
M
V
M
90 %
10 % 10 %
t
THL
(t
f
)
t
TLH
(t
r
)
t
TLH
(t
r
)
t
THL
(t
f
)
V
EXT
V
CC
V
I
V
O
mna616
D.U.T.
C
L
R
T
R
L
R
L
PULSE
GENERATOR
9397 750 14402 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 12 January 2005 17 of 21
Philips Semiconductors
74LVT16652A
3.3 V 16-bit bus transceiver/register; 3-state
13. Package outline
Fig 13. Package outline SOT364-1 (TSSOP56)
UNIT A
1
A
2
A
3
b
p
cD
(1)
E
(2)
eH
E
LL
p
QZywv θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
0.15
0.05
0.2
0.1
8
0
o
o
0.1
DIMENSIONS (mm are the original dimensions).
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
SOT364-1
99-12-27
03-02-19
w M
θ
A
A
1
A
2
D
L
p
Q
detail X
E
Z
e
c
L
X
(A )
3
0.25
128
56 29
y
pin 1 index
b
H
1.05
0.85
0.28
0.17
0.2
0.1
14.1
13.9
6.2
6.0
0.5 1
8.3
7.9
0.50
0.35
0.5
0.1
0.080.25
0.8
0.4
p
E
v M
A
A
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1 mm
SOT364-1
A
max.
1.2
0
2.5
5 mm
scale
MO-153
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P22

74LVT16652ADL,518

Mfr. #:
Buy 74LVT16652ADL,518
Manufacturer:
NXP Semiconductors
Description:
Bus Transceivers 3.3V 16-BIT BUS XCVR
Lifecycle:
New from this manufacturer.
Delivery:
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