ADR520/ADR525/ADR530/ADR540/ADR550
Rev. E | Page 11 of 16
THEORY OF OPERATION
The ADR520/ADR525/ADR530/ADR540/ADR550 use the
band gap concept to produce a stable, low temperature coefficient
voltage reference suitable for high accuracy data acquisition
components and systems. The devices use the physical nature of a
silicon transistor base-emitter voltage (V
BE
) in the forward-biased
operating region. All such transistors have approximately a
−2 mV/°C temperature coefficient (TC), making them unsuitable
for direct use as low temperature coefficient references. Extra-
polation of the temperature characteristics of any one of these
devices to absolute zero (with the collector current proportional
to the absolute temperature), however, reveals that its V
BE
approaches approximately the silicon band gap voltage. Thus,
if a voltage develops with an opposing temperature coefficient
to sum the V
BE
, a zero temperature coefficient reference results.
The ADR520/ADR525/ADR530/ADR540/ADR550 circuit
shown in Figure 18 provides such a compensating voltage (V1)
by driving two transistors at different current densities and
amplifying the resultant V
BE
difference (ΔV
BE
, which has a
positive temperature coefficient). The sum of V
BE
and V1
provides a stable voltage reference over temperature.
V
BE
+
–
Δ
V
BE
+
–
V1
V–
V+
+
–
04501-002
Figure 18. Circuit Schematic
APPLICATIONS
The ADR520/ADR525/ADR530/ADR540/ADR550 are a
series of precision shunt voltage references. They are designed
to operate without an external capacitor between the positive
and negative terminals. If a bypass capacitor is used to filter the
supply, the references remain stable.
All shunt voltage references require an external bias resistor (R
BIAS
)
between the supply voltage and the reference (see Figure 19).
R
BIAS
sets the current that flows through the load (I
L
) and the
reference (I
IN
). Because the load and the supply voltage can vary,
R
BIAS
needs to be chosen based on the following considerations:
• R
BIAS
must be small enough to supply the minimum I
IN
current to the ADR520/ADR525/ADR530/ADR540/
ADR550, even when the supply voltage is at its minimum
value and the load current is at its maximum value.
• R
BIAS
must be large enough so that I
IN
does not exceed
15 mA when the supply voltage is at its maximum value
and the load current is at its minimum value.
V
OUT
V
S
ADR550
I
L
I
IN
R
I
IN
+ I
L
04501-003
Figure 19. Shunt Reference
Given these conditions, R
BIAS
is determined by the supply
voltage (V
S
), the load and operating currents (I
L
and I
IN
) of
the ADR520/ADR525/ADR530/ADR540/ADR550, and the
output voltage (V
OUT
) of the ADR520/ADR525/ADR530/
ADR540/ADR550.
INL
OUT
S
BIAS
II
VV
R
+
−
=
(3)
Precision Negative Voltage Reference
The ADR520/ADR525/ADR530/ADR540/ADR550 are suit-
able for applications where a precise negative voltage is desired.
Figure 20 shows the ADR525 configured to provide a negative
output.
V
S
–2.5V
ADR525
R
04501-004
Figure 20. Negative Precision Reference Configuration
Output Voltage Trim
The trim terminal of the ADR520/ADR525/ADR530/ADR540/
ADR550 can be used to adjust the output voltage over a range
of ±0.5%. This allows systems designers to trim system errors
by setting the reference to a voltage other than the preset output
voltage. An external mechanical or electrical potentiometer can
be used for this adjustment. Figure 21 illustrates how the output
voltage can be trimmed using the AD5273, an Analog Devices,
Inc., 10 kΩ potentiometer.
R1
470kΩ
POTENTIOMETER
10kΩ
ADR530
AD5273
R
V
OUT
V
S
04501-005
Figure 21. Output Voltage Trim
