74AHC_AHCT594_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 2 — 4 July 2013 5 of 24
NXP Semiconductors 74AHC594-Q100; 74AHCT594-Q100
8-bit shift register with output register
6.2 Pin description
(1) The die substrate is attached to this pad using
conductive die attach material. It cannot be used as
supply pin or input.
Fig 6. Pin configuration (T)SSOP16 Fig 7. Pin configuration DHVQFN16
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4
4
4
4
4 '6
4 4
*1'
46
4
9
&&
*1'
Table 2. Pin description
Symbol Pin Description
Q1 1 parallel data output
Q2 2 parallel data output
Q3 3 parallel data output
Q4 4 parallel data output
Q5 5 parallel data output
Q6 6 parallel data output
Q7 7 parallel data output
GND 8 ground (0 V)
Q7S 9 serial data output
SHR
10 shift register reset input (active LOW)
SHCP 11 shift register clock input
STCP 12 storage register clock input
STR
13 storage register reset input (active LOW)
DS 14 serial data input
Q0 15 parallel data output
V
CC
16 supply voltage
