Document Number: 001-96786 Rev. *A Page 4 of 24
Pin Definitions
Tab l e 1 provides the pin definitions for 40-pin QFN and 35-ball WLCSP for the notebook, tablet, smartphone, and monitor applications.
Refer to Table 20 on page 18 for par numbers to package mapping.
Table 1. Pin Definition for 40-Pin QFN and 35-Ball WLCSP
Functional Pin
Name
CYPD1120-35FNXIT CYPD1120-40LQXI Type Description
CC1_RX C4 35 I
CC1 control
0: TX enabled
z: RX sense
CC1_TX D7 38 O Configuration Channel 1
SWD_IO D1 12 I/O SWD IO
SWD_CLK C1 13 I SWD Clock
I2C_SCL B1 18 I I
2
C Slave Clock signal
I2C_SDA B2 19 I/O I
2
C Slave Data signal
I2C_INT A2 20 O I
2
C INT
XRES B6 30 I Active Low Reset
VCCD A7 31 POWER Connect 1-μF capacitor between VCCD and Ground
VDDD C7
32
POWER
VCONN Supply
VDDA C7 33 POWER
VSSA B7 34 GND Ground
VSS – 9 GND Ground
CC_VREF
C5 36 I Data reference signal for CC lines
ADC_BYPASS E7 40 I No Connect
TX_U B3 26 O
Signals for internal use only. The TX_U output signal
should be connected to the TX_M signal
TX_M B5 29 I
TX_REF_IN D3 3 I
Reference signal for internal use. Connect to TX_REF
output via a 2.4K 1% resistor
TX_GND A3 25 I Connect to GND via 2K 1% resistor
TX_REF_OUT D4 39 O
Reference signal generated by connecting internal
current source to two 1K external resistors
RA_DISCONNECT E4 4 O
Optional control signal to remove RA after assertion of
VCONN
0: RA disconnected
1: RA connected
CC1_LPREF A5 23 I
Reference signal for internal use. Connect to the output
of resistor divider from VDDD.
VCONN_DET E5 5 O
Detects presence of VCONN before responding to CC
communication
BYPASS
D5 –
I Bypass capacitor for internal analog circuits
–37
CC1_LPRX C3 22 I
Configuration Channel 1 RX signal for Low Power
States
VBUS_DET B4 28 I
Detects presence of VBUS before enabling Billboard
device
