BD7561G,BD7561SG,BD7541G,BD7541SG,
BD7562F/FVM,BD7562SF/FVM, BD7542F/FVM,BD7542SF/FVM
Technical Note
16/20
www.rohm.com
2012.09 - Rev.B
© 2012 ROHM Co., Ltd. All rights reserved.
2.11 Slew rate (SR)
Indicates the time fluctuation ratio of voltage output when step input signal is applied.
2.12 Unity gain frequency (ft)
Indicates a frequency where the voltage gain of Op-Amp is 1.
2.13 Total harmonic distortion + Noise (THDN)
Indicates the fluctuation of input offset voltage or that of output voltage with reference to the change of output voltage
of driven channel.
2.14 Input referred noise voltage (Vn)
Indicates a noise voltage generated inside the operational amplifier equivalent by ideal voltage source connected in series
with input terminal.
Derating curve
Power dissipation (total loss) indicates the power that can be consumed by IC at Ta=25(normal temperature).
IC is heatedwhen it consumed power, and the temperature of IC ship becomes higher than ambient temperature.
The temperature that can be accepted by IC chip depends on circuit configuration, manufacturing process, and consumable
power is limited. Power dissipation is determined by the temperature allowed in IC chip (maximum junction temperature) and
thermal resistance of package (heat dissipation capability).
The maximum junction temperature is typically equal to the maximum value in the storage package (heat dissipation capability).
The maximum junction temperature is typically equal to the maximum value in the storage temperature range.
Heat generated by consumed power of IC radiates from the mold resin or lead frame of the package.
The parameter which indicates this heat dissipation capability (hardness of heat release) is called thermal resistance, represented
by the symbol θj-a[/W]. The temperature of IC inside the package can be estimated by this thermal resistance.
Fig.98 (a) shows the model of thermal resistance of the package. Thermal resistance θja, ambient temperature Ta, junction
temperature Tj, and power dissipation Pd can be calculated by the equation below :
θja (Tj-Ta) / Pd [/W] ・・・・・ ()
Derating curve in Fig.98 (b) indicates power that can be consumed by IC with reference to ambient temperature.
Power that can be consumed by IC begins to attenuate at certain ambient temperature. This gradient iis determined by
thermal resistance θja.
Thermal resistance θja depends on chip size, power consumption, package, ambient temperature, package condition, wind
velocity, etc even when the same of package is used.
Thermal reduction curve indicates a reference value measured at a specified condition. Fig99(c)-(f) show a derating curve
for an example of BU7561family, BU7562family, 7541family, 7542family.
(a) Thermal resistance
(b) Derating curve
0
周囲温度
Ta[
]
P2
P1
25 125
75 15010050
LSI
の消費電力
[W]
Pd(max)
Tj(max)
θja2
θja1
θja2 <θja1
BD7561/BD7541
Tj(max)
Ambient temperature Ta []
Power dissipation of LSI [W]
パッケージ表面温度
Ta[
]
周囲温度
Ta[
]
チップ表面温度
Tj[
]
消費電力
P[W]
θja
(Tj
Ta) / Pd [
/W]
Chip surface temperature Tj []
Power dissipation P [W]
Ambient temperature Ta []
Package surface temperature []
Fig. 98. Thermal resistance and derating
BD7561G,BD7561SG,BD7541G,BD7541SG,
BD7562F/FVM,BD7562SF/FVM, BD7542F/FVM,BD7542SF/FVM
Technical Note
17/20
www.rohm.com
2012.09 - Rev.B
© 2012 ROHM Co., Ltd. All rights reserved.
(*8) (*9) (*10) Unit
5.4 6.2 4.8 [mW/]
When using the unit above Ta=25[], subtract the value above per degree[]. Permissible dissipation is the value
when FR4 glass epoxy board 70[mm]×70[mm]×1.6[mm] (cooper foil area below 3[]) is mounted.
0
200
400
600
800
0 50 100 150
AMBIENT TEMPERATURE [
]
POWER DISSIPATION [mW] .
85
0
200
400
600
800
1000
0 50 100 150
AMBIENT TEMPERATURE [
]
POWER DISSIPATION [mW]
.
85
0
200
400
600
800
0 50 100 150
AMBIENT TEMPERATURE [
]
POWER DISSIPATION [mW]
.
BD7541SG(*8)
105
0
200
400
600
800
1000
0 50 100 150
AMBIENT TEMPERATURE [
]
POWER DISSIPATION [mW]
.
105
(c) BD7561G
(d) BD7562F/FVM BD7542F/FVM
(e) BD7561SG
(f) BD7562S F/FVM BD7542S F/FVM
BD7561SG(*8)
BD7561G(*8)
BD7541G(*8)
540[mw
620[mw]
480[mw]
540[mw
BD7562F(*9
BD7542F(*9
BD7562FVM(*10)
BD7542FVM(*10)
620[mw]
480[mw]
BD7562SF(*9
BD7542SF(*9
BD7562SFVM(*10)
BD7542SFVM(*10)
Fig. 99. Derating curve
BD7561G,BD7561SG,BD7541G,BD7541SG,
BD7562F/FVM,BD7562SF/FVM, BD7542F/FVM,BD7542SF/FVM
Technical Note
18/20
www.rohm.com
2012.09 - Rev.B
© 2012 ROHM Co., Ltd. All rights reserved.
N0tes for use
1) Absolute maximum ratings
Absolute maximum ratings are the values which indicate the limits,within which the given voltage range can be safely
charged to the terminal.However, it does not guarantee the circuit operation.
2) Applied voltage to the input terminal
For normal circuit operation of voltage comparator, please input voltage for its input terminal within input common mode
voltage VDD+0.3[V].Then, regardless of power supply voltage,VSS-0.3[V] can be applied to inputterminals without
deterioration or destruction of its characteristics.
3) Operating power supply (split power supply/single power supply)
The voltage comparator operates if a given level of voltage is applied between VDD and VSS. Therefore, the operational
amplifier can be operated under single power supply or split power supply.
4) Power dissipation (Pd)
If the IC is used under excessive power dissipation. An increase in the chip temperature will cause deterioration of the
radical characteristics of IC. For example, reduction of current capability. Take consideration of the effective power
dissipation andthermal design with a sufficient margin. Pd is reference to the provided power dissipation curve.
5) Short circuits between pins and incorrect mounting
Short circuits between pins and incorrect mounting when mounting the IC on a printed circuits board, take notice of the
direction and positioning of the IC.If IC is mounted erroneously, It may be damaged. Also, when a foreign object is inserted
between output, between output and VDD terminal or VSS terminal which causes short circuit, the IC may be damaged.
6) Using under strong electromagnetic field
Be careful when using the IC under strong electromagnetic field because it may malfunction.
7) Usage of IC
When stress is applied to the IC through warp of the printed circuit board, The characteristics may fluctuate due to the
piezo effect. Be careful of the warp of the printed circuit board.
8) Testing IC on the set board
When testing IC on the set board, in cases where the capacitor is connected to the low impedance,make sure to discharge
per fabrication because there is a possibility that IC may be damaged by stress.
When removing IC from the set board, it is essential to cut supply voltage.As a countermeasure against the static
electricity, observe proper grounding during fabrication processand take due care when carrying and storage it.
9) The IC destruction caused by capacitive load
The transistors in circuits may be damaged when VDD terminal and VSS terminal is shorted with the charged output
terminal capacitor. When IC is used as a operational amplifier or as an application circuit,where oscillation is not activated
by an output capacitor, the output capacitor must be kept below 0.1[μF] in order to prevent the damage mentioned above.
10) Decupling capacitor
Insert the deculing capacitance between VDD and VSS, for stable operation of operational amplifier.
11) Latch up
Be careful of input vltage that exceed the VDD and VSS. When CMOS device have sometimes occur latch up operation.
And protect the IC from abnormaly noise.

BD7542SFVM-TR

Mfr. #:
Manufacturer:
Description:
Operational Amplifiers - Op Amps High Voltage 5-14.5V 4mA; 0.3 slew rate
Lifecycle:
New from this manufacturer.
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