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LTC3605EUF#TRPBF

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LTC3605
10
3605fh
For more information www.linear.com/LTC3605
Multiphase Operation
For output loads that demand more than 5A of current,
multiple LTC3605s can be cascaded to run out of phase
to provide more output current. The CLKIN pin allows the
LTC3605 to synchronize to an external clock (±50% of
frequency programmed by RT) and the internal phase-
locked-loop allows the LTC3605 to lock onto CLKIN’s
phase as well. The CLKOUT signal can be connected to the
CLKIN pin of the following LTC3605 stage to line up both
the frequency and the phase of the entire system. Tying
the PHMODE pin to INTV
CC
, SGND or INTV
CC
/2 generates
a phase difference (between CLKIN and CLKOUT) of 180
degrees, 120 degrees, or 90 degrees respectively, which
corresponds to 2-phase, 3-phase or 4-phase operation. A
total of 12 phases can be cascaded to run simultaneously
out of phase with respect to each other by programming
the PHMODE pin of each LTC3605 to different levels.
Internal/External ITH Compensation
During single phase operation, the user can simplify the
loop compensation by tying the I
TH
pin to INTV
CC
to en-
able internal compensation. This connects an internal 30k
resistor in series with a 40
pF capacitor to the output of
the error amplifier (internal ITH compensation point) while
also activating output voltage positioning such that the
output voltage will be 1.5% above regulation at no load and
1.5% below regulation at full load. This is a trade-off for
simplicity instead of OPTI-LOOP
®
optimization, where ITH
components are external and are selected to optimize the
loop transient response with minimum output capacitance.
Minimum Off-Time and Minimum On-Time
Considerations
The minimum off-time, t
OFF(MIN)
, is the smallest amount
of time that the LTC3605 is capable of turning on the bot-
tom power MOSFET, tripping the current comparator and
turning the power MOSFET back off
.
This time is generally
about 70ns. The minimum off-time limit imposes a maxi
-
mum duty cycle of t
ON
/(t
ON
+ t
OFF(MIN)
). If the maximum
duty cycle is reached, due to a dropping input voltage for
example, then the output will drop out of regulation. The
minimum input voltage to avoid dropout is:
V
IN(MIN)
= V
OUT
•
t
ON
+ t
OFF(MIN)
t
ON
Conversely, the minimum on-time is the smallest dura-
tion of time in which the top power MOSFET can be in
its “on”
state. This time is typically 40ns. In continuous
mode operation, the minimum on-time limit imposes a
minimum duty cycle of:
DC
MIN
= f • t
ON(MIN)
where t
ON(MIN)
is the minimum on-time. As the equation
shows, reducing the operating frequency will alleviate the
minimum duty cycle constraint.
In the rare cases where the minimum duty cycle is sur
-
passed, the output voltage will still remain in regulation, but
the switching frequency will decrease from its programmed
value. This is an acceptable result in many applications, so
this constraint may not be of critical importance in most
cases. High switching frequencies may be used in the
design without any fear of severe consequences. As the
sections on inductor and capacitor selection show, high
switching frequencies allow the use of smaller board com
-
ponents, thus reducing the size of the application circuit.
C
IN
and C
OUT
Selection
The input capacitance, C
IN
, is needed to filter the trapezoi-
dal wave current at the drain of the top power MOSFET.
To prevent large voltage transients from occurring
, a low
ESR input capacitor sized for the maximum R
MS
current
should be used. The maximum R
MS
current is given by:
I
RMS
≅I
OUT(MAX)
V
OUT
V
IN
V
IN
V
OUT
–
1
This formula has a maximum at V
IN
= 2V
OUT
, where
I
RMS
≅ I
OUT
/2. This simple worst-case condition is com-
monly used for design because even significant deviations
do not offer much relief.
Note that ripple current ratings
from capacitor manufacturers are often based on only
operaTion
LTC3605
11
3605fh
For more information www.linear.com/LTC3605
2000 hours of life which makes it advisable to further
derate the capacitor, or choose a capacitor rated at a
higher temperature than required.
Several capacitors may also be paralleled to meet size or
height requirements in the design. For low input voltage
applications, sufficient bulk input capacitance is needed
to minimize transient effects during output load changes.
The selection of C
OUT
is determined by the effective series
resistance (ESR) that is required to minimize voltage ripple
and load step transients as well as the amount of bulk
capacitance that is necessary to ensure that the control
loop is stable. Loop stability can be checked by viewing
the load transient response. The output ripple, DV
OUT
, is
determined by:
DV
OUT
< DI
L
1
8 • f • C
OUT
+ESR
⎛
⎝
⎜
⎞
⎠
⎟
The output ripple is highest at maximum input voltage
since DI
L
increases with input voltage. Multiple capaci-
tors placed in parallel may be needed to meet the ESR
and RMS current handling requirements.
Dry tantalum,
special polymer, aluminum electrolytic, and ceramic
capacitors are all available in surface mount packages.
Special polymer capacitors are very low ESR but have
lower capacitance density than other types. Tantalum
capacitors have the highest capacitance density but it is
important to only use types that have been surge tested
for use in switching power supplies. Aluminum electrolytic
capacitors have significantly higher ESR, but can be used
in cost-sensitive applications provided that consideration
is given to ripple current ratings and long-term reliability.
Ceramic capacitors have excellent low ESR characteristics
and small footprints. Their relatively low value of bulk
capacitance may require multiples in parallel.
Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
operaTion
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
V
IN
input. At best, this ringing can couple to the output and
be mistaken as loop instability. At worst, a sudden inrush
of current through the long wires can potentially cause
a voltage spike at V
IN
large enough to damage the part.
When choosing the input and output ceramic capacitors,
choose the X5R and X7R dielectric formulations. These
dielectrics have the best temperature and voltage char
-
acteristics of all the ceramics for a given value and size.
Since the ESR of a ceramic capacitor is so low,
the input
and output capacitor must instead fulfill a charge storage
requirement. During a load step, the output capacitor must
instantaneously supply the current to support the load
until the feedback loop raises the switch current enough
to support the load. The time required for the feedback
loop to respond is dependent on the compensation and the
output capacitor size. Typically, 3 to 4 cycles are required
to respond to a load step, but only in the first cycle does
the output drop linearly. The output droop, V
DROOP
, is
usually about 2 to 3 times the linear drop of the first cycle.
Thus, a good place to start with the output capacitor value
is approximately:
C
OUT
≈ 2.5
D
I
OUT
f
O
• V
DROOP
More capacitance may be required depending on the duty
cycle and load step requirements.
In most applications, the input capacitor is merely required
to supply high frequency bypassing, since the impedance to
the supply is very low. A 22µF ceramic capacitor is usually
enough for these conditions. Place this input capacitor as
close to the PV
IN
pins as possible.
Inductor Selection
Given the desired input and output voltages, the inductor
value and operating frequency determine the ripple current:
DI
L
=
V
OUT
f • L
1–
V
OUT
V
IN(MAX)
⎛
⎝
⎜
⎜
⎞
⎠
⎟
⎟
LTC3605
12
3605fh
For more information www.linear.com/LTC3605
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
Different core materials and shapes will change the size/
current and price/current relationship of an inductor. Toroid
or shielded pot cores in ferrite or permalloy materials are
small and don’t radiate much energy, but generally cost
more than powdered iron core inductors with similar
characteristics. The choice of which style inductor to use
mainly depends on the price versus size requirements
and any radiated field/EMI requirements. New designs for
surface mount inductors are available from Toko, Vishay,
NEC/Tokin, Cooper, TDK and Wurth Elektronik. Refer to
Table 1 for more details.
Checking Transient Response
The OPTI-LOOP compensation allows the transient re
-
sponse to be optimized for a wide range of loads and
output capacitors. The availability of the ITH pin not
only allows optimization of the control loop behavior but
also provides a DC-coupled and AC-filtered closed-loop
response test point. The DC step, rise time and settling
at this test point truly reflects the closed-loop response.
Assuming a predominantly second order system, phase
margin and/or damping factor can be estimated using the
percentage of overshoot seen at this pin.
The ITH external components shown in the circuit on the
first page of this data sheet provides an adequate starting
point for most applications. The series R-C filter sets the
dominant pole zero loop compensation. The values can
be modified slightly (from 0.5 to 2 times their suggested
values) to optimize transient response once the final PC
layout is done and the particular output capacitor type
and value have been determined. The output capacitors
need to be selected because their various types and values
determine the loop feedback factor gain and phase. An
output current pulse of 20% to 100% of full load current
having a rise time of 1µs to 10µs will produce output volt
-
age and ITH pin waveforms that will give a sense of the
overall loop stability without breaking the feedback loop.
Switching regulators take several cycles to respond to a
step in load current. When a load step occurs, V
OUT
im-
mediately shifts by an amount equal to DI
LOAD
• ESR, where
operaTion
Lower ripple current reduces core losses in the inductor,
ESR losses in the output capacitors and output voltage
ripple. Highest efficiency operation is obtained at low
frequency with small ripple current. However, achieving
this requires a large inductor. There is a trade-off between
component size, efficiency and operating frequency.
A reasonable starting point is to choose a ripple current
that is about 2.5A. This is especially important at low V
OUT
operation where V
OUT
is 1.8V or below. Care must be
given to choose an inductance value that will generate a
big enough current ripple (1.5A to 2.5A) so that the chip’s
valley current comparator has enough signal-to-noise ratio
to force constant switching frequency. Meanwhile, also note
that the largest ripple current occurs at the highest V
IN
. To
guarantee that ripple current does not exceed a specified
maximum, the inductance should be chosen according to:
L =
V
OUT
f • DI
L(MAX)
• 1–
V
OUT
V
IN(MAX)
⎛
⎝
⎜
⎜
⎞
⎠
⎟
⎟
However, the inductor ripple current must not be so large
that its valley current level (–∆I
L
/2) can exceed the negative
current limit, which can be as low as –3.5A. If the negative
current limit is exceeded in forced continuous mode of op
-
eration, V
OUT
can get charged to above the regulation level
until the inductor current no longer exceeds the negative
current limit. In such instances, choose a larger inductor
value to reduce the inductor ripple current. The alternative
is to reduce the R
T
resistor value to increase the switching
frequency in order to reduce the inductor ripple current.
Once the value for L is known, the type of inductor must
be selected. Actual core loss is independent of core size
for a fixed inductor value, but is very dependent on the
inductance selected. As the inductance or frequency in
-
creases, core losses decrease. Unfortunately, increased
inductance requires more turns of wire and therefore
copper losses will increase.
Ferrite designs have very low core losses and are pre
-
ferred at high switching frequencies, so design goals can
concentrate on copper loss and preventing saturation.
Ferrite core material saturates
“hard”, which means that
inductance collapses abruptly when the peak design current
is exceeded. This results in an abrupt increase in inductor
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LTC3605EUF#TRPBF

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Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 14V, 5A PolyPhase Synchronous Step Down Regulator
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