7
Functional Description
Initialization
The ISL6522B automatically initializes upon receipt of
power. Special sequencing of the input supplies is not
necessary. The Power-On Reset (POR) function continually
monitors the input supply voltages and the enable (EN) pin.
The POR monitors the bias voltage at the VCC pin and the
input voltage (V
IN
) on the OCSET pin. The level on OCSET
is equal to V
IN
Less a fixed voltage drop (see overcurrent
protection). With the EN pin held to V
CC
, the POR function
initiates soft-start operation after both input supply voltages
exceed their POR thresholds. For operation with a single
+12V power source, V
IN
and V
CC
are equivalent and the
+12V power source must exceed the rising V
CC
threshold
before POR initiates operation.
The POR function inhibits operation with the chip disabled
(EN pin low). With both input supplies above their POR
thresholds, transitioning the EN pin high initiates a soft-start
interval.
Soft-Start
The POR function initiates the soft-start sequence. An
internal 10A current source charges an external capacitor
(C
SS
) on the SS pin to 4V. Soft-start clamps the error
amplifier output (COMP pin) to the SS pin voltage. Figure 3
shows the soft-start interval. At t
1
in Figure 3, the SS and
COMP voltages reach the valley of the oscillator’s triangle
wave. The oscillator’s triangular waveform is compared to
the ramping error amplifier voltage. This generates PHASE
pulses of increasing width that charge the output
capacitor(s). This interval of increasing pulse width
continues to t2, at which point the output is in regulation and
the clamp on the COMP pin is released. This method
provides a rapid and controlled output voltage rise.
During Soft-Start, the ISL6522B controls the regulator in a
standard buck fashion. The lower MOSFET is not enabled
during soft-start. The body diode of the MOSFET or the
external diode, if used, will conduct when the upper
MOSFET is OFF. Once the output has reached regulation,
the lower MOSFET is enabled and the regulator is controlled
as a synchronous buck regulator. This allows the ISL6522B
regulator to start into a pre-biased output.
During Soft Start, the ISL6522B functions as a standard buck
converter by disabling the lower MOSFET. This is done by
holding the LGATE pin LOW. If there is not a diode in parallel
with the lower MOSFET, the body diode of the lower
MOSFET will conduct when the upper MOSFET is off. Once
the SS pin has reached it’s peak value, the lower MOSFET
is enabled and the ISL6522B functions as a synchronous
buck converter.
FIGURE 3. SOFT-START INTERVAL
VOLTAGE
TIME
V
OSC(MIN)
t
0
t
1
t
2
CLAMP ON V
COMP
V
COMP
V
SOFT START
V
OUT
t
1
C
SS
I
SS
-----------
V
OSC MIN
=
t
SoftStart
t
2
t
1
C
SS
I
SS
-----------
V
OUT
SteadyState
V
IN
------------------------------------------------
V
OSC
==
Where:
C
SS
= Soft Start Capacitor
I
SS
= Soft Start Current = 10A
V
OSC(MIN)
= Bottom of Oscillator = 1.35V
V
IN
= Input Voltage
V
OSC
= Peak to Peak Oscillator Voltage = 1.9V
V
OUTSteadyState
= Steady State Output Voltage
RELEASED AT STEADY STATE
OUTPUT INDUCTOR SOFT-START
0A
0V
TIME (20ms/DIV)
5A
10A
15A
2V
4V
FIGURE 4. OVERCURRENT OPERATION
ISL6522B
8
Overcurrent Protection
The overcurrent function protects the converter from a
shorted output by using the upper MOSFETs on-resistance,
r
DS(ON)
to monitor the current. This method enhances the
converter’s efficiency and reduces cost by eliminating a
current sensing resistor.
The overcurrent function cycles the soft-start function in a
hiccup mode to provide fault protection. A resistor (R
OCSET
)
programs the overcurrent trip level. An internal 200A
(typical) current sink develops a voltage across R
OCSET
that
is in reference to V
IN
. When the voltage across the upper
MOSFET (also referenced to V
IN
) exceeds the voltage
across R
OCSET
, the overcurrent function initiates a soft-start
sequence. The soft-start function discharges C
SS
with a
10A current sink and inhibits PWM operation. The soft-start
function recharges C
SS
, and PWM operation resumes with
the error amplifier clamped to the SS voltage. Should an
overload occur while recharging C
SS
, the soft-start function
inhibits PWM operation while fully charging C
SS
to 4V to
complete its cycle. Figure 4 shows this operation with an
overload condition. Note that the inductor current increases
to over 15A during the C
SS
charging interval and causes an
overcurrent trip. The converter dissipates very little power
with this method. The measured input power for the
conditions of Figure 4 is 2.5W.
The overcurrent function will trip at a peak inductor current
(I
PEAK)
determined by:
where I
OCSET
is the internal OCSET current source (200A
is typical). The OC trip point varies mainly due to the
MOSFETs r
DS(ON)
variations. To avoid overcurrent tripping
in the normal operating load range, find the R
OCSET
resistor
from the equation above with:
The maximum r
DS(ON)
at the highest junction temperature.
1. The minimum I
OCSET
from the specification table.
2. Determine ,
where I is the output inductor ripple current.
For an equation for the ripple current see the section under
component guidelines titled Output Inductor Selection.
A small ceramic capacitor should be placed in parallel with
R
OCSET
to smooth the voltage across R
OCSET
in the
presence of switching noise on the input voltage.
Current Sinking
The ISL6522B incorporates a MOSFET shoot-through
protection method which allows a converter to sink current
as well as source current. Care should be exercised when
designing a converter with the ISL6522B when it is known
that the converter may sink current.
When the converter is sinking current, it is behaving as a
boost converter that is regulating its input voltage. This
means that the converter is boosting current into the V
IN
rail,
the voltage that is being down-converted. If there is nowhere
for this current to go, such as to other distributed loads on
the V
IN
rail, through a voltage limiting protection device, or
other methods, the capacitance on the V
IN
bus will absorb
the current. This situation will cause the voltage level of the
V
IN
rail to increase. If the voltage level of the rail is boosted
to a level that exceeds the maximum voltage rating of the
MOSFETs or the input capacitors, damage may occur to
these parts. If the bias voltage for the ISL6522B comes from
the V
IN
rail, then the maximum voltage rating of the
ISL6522B may be exceeded and the IC will experience a
catastrophic failure and the converter will no longer be
operational. Ensuring that there is a path for the current to
follow other than the capacitance on the rail will prevent
these failure modes.
Application Guidelines
Layout Considerations
As in any high frequency switching converter, layout is very
important. Switching current from one power device to
another can generate voltage transients across the
impedances of the interconnecting bond wires and circuit
traces. These interconnecting impedances should be
minimized by using wide, short printed circuit traces. The
critical components should be located as close together as
possible using ground plane construction or single point
grounding.
Figure 5 shows the critical power components of the
converter. To minimize the voltage overshoot the
interconnecting wires indicated by heavy lines should be part
of ground or power plane in a printed circuit board. The
components shown in Figure 6 should be located as close
together as possible. Please note that the capacitors C
IN
and C
O
each represent numerous physical capacitors.
Locate the ISL6522B within three inches of the MOSFETs,
Q1 and Q2. The circuit traces for the MOSFETs’ gate and
source connections from the ISL6522B must be sized to
handle up to 1A peak current.
I
PEAK
I
OCSET
R
OCSET
r
DS ON
---------------------------------------------------
=
I
PEAK
for I
PEAK
I
OUT MAX
I2+
PGND
L
O
C
O
LGATE
UGATE
PHASE
Q1
Q2
D2
FIGURE 5. PRINTED CIRCUIT BOARD POWER AND
GROUND PLANES OR ISLANDS
V
IN
V
OUT
RETURN
ISL6522B
C
IN
LOAD
ISL6522B
9
Figure 6 shows the circuit traces that require additional
layout consideration. Use single point and ground plane
construction for the circuits shown. Minimize any leakage
current paths on the SS PIN and locate the capacitor, C
SS
close to the SS pin because the internal current source is
only 10A. Provide local V
CC
decoupling between VCC and
GND pins. Locate the capacitor, C
BOOT
as close as practical
to the BOOT and PHASE pins.
Feedback Compensation
Figure 7 highlights the voltage-mode control loop for a
synchronous rectified buck converter. The output voltage
(V
OUT
) is regulated to the reference voltage level. The error
amplifier (error amp) output (V
E/A
) is compared with the
oscillator (OSC) triangular wave to provide a pulse-width
modulated (PWM) wave with an amplitude of V
IN
at the
PHASE node. The PWM wave is smoothed by the output filter
(L
O
and C
O
).
The modulator transfer function is the small-signal transfer
function of V
OUT
/V
E/A
. This function is dominated by a DC
gain and the output filter (L
O
and C
O
), with a double pole
break frequency at F
LC
and a zero at F
ESR
. The DC gain of
the modulator is simply the input voltage (V
IN
) divided by the
peak-to-peak oscillator voltage V
OSC
.
Modulator Break Frequency Equations
The compensation network consists of the error amplifier
(internal to the ISL6522B) and the impedance networks Z
IN
and Z
FB
. The goal of the compensation network is to provide
a closed loop transfer function with the highest 0dB crossing
frequency (f
0dB
) and adequate phase margin. Phase margin
is the difference between the closed loop phase at f
0dB
and
180 degrees The equations below relate the compensation
network’s poles, zeros and gain to the components (R1, R2,
R3, C1, C2, and C3) in Figure 8. Use these guidelines for
locating the poles and zeros of the compensation network:
Compensation Break Frequency Equations
1. Pick Gain (R2/R1) for desired converter bandwidth
2. Place 1
ST
Zero Below Filter’s Double Pole
(~75% F
LC
)
FIGURE 6. PRINTED CIRCUIT BOARD SMALL SIGNAL
LAYOUT GUIDELINES
+12V
ISL6522B
SS
GND
VCC
BOOT
D1
L
O
C
O
V
OUT
LOAD
Q1
Q2
PHASE
+V
IN
C
BOOT
C
VCC
C
SS
FIGURE 7. VOLTAGE - MODE BUCK CONVERTER
COMPENSATION DESIGN
V
OUT
OSC
REFERENCE
L
O
C
O
ESR
V
IN
V
OSC
ERROR
AMP
PWM
DRIVER
(PARASITIC)
-
REF
R1
R3
R2
C3
C2
C1
COMP
V
OUT
FB
Z
FB
ISL6522B
Z
IN
COMPARATOR
DRIVER
DETAILED COMPENSATION COMPONENTS
PHASE
V
E/A
+
-
+
-
Z
IN
Z
FB
+
F
LC
1
2 L
O
C
O
---------------------------------------
=
F
ESR
1
2 ESR C
O

---------------------------------------------
=
F
Z1
1
2 R 2C1
----------------------------------
=
F
Z2
1
2 R1 R3+C3
------------------------------------------------------
=
F
P1
1
2 R2
C1 C2
C1 C2+
----------------------


-------------------------------------------------------
=
F
P2
=
1
2 R3 C3
----------------------------------
ISL6522B

ISL6522BIBZ

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Switching Controllers PWM CNTRLR DDRG 14LD N LGATE DISA
Lifecycle:
New from this manufacturer.
Delivery:
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