ICM7218
7
FN3159.4
May 17, 2016
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Detailed Description
DECODE Operation
For the lCM7218A/B products, there are 3 input data formats
possible; either direct segment and decimal point information
(8 bits per digit) or two Binary formats plus decimal point
information (Hexadecimal/Code B formats with 5 bits per digit).
The 7-segment decoder on chip is disabled when direct
segment information is to be written. In this format, the inputs
directly control the outputs as follows:
Here, “Ones” represent “on” segments for all inputs except the
Decimal Point. For the Decimal Point “zero” represents an “on”
segment.
HEXAdecimal/CODE B Decoding
For all products, a choice of either HEXA or Code B decoding
may be made. HEXA decoding provides 7-segment numeric plus
six alpha characters while Code B provides a negative sign (-), a
blank (for leading zero blanking), certain useful alpha
characters and all numeric formats.
The four bit binary code is set up on inputs lD3-lD0, and
decimal point data is set up on ID7.
SHUTDOWN
SHUTDOWN performs several functions: it puts the device into a
very low dissipation mode (typically 10µA at V
DD
= 5V), turns off
both the digit and segment drivers, and stops the multiplex scan
oscillator (this is the only way the scan oscillator can be
disabled). However, it is still possible to input data to the
memory during shutdown - only the display output sections of
the device are disabled in this mode.
Powerdown
In the Shutdown mode, the supply voltage may be reduced to 2V
without data in memory being lost. However, data should not be
written into memory if the supply voltage is less than 4V.
Output Drive
The common anode output drive is approximately 200mA per
digit at a 12% duty cycle. With segment peak drive current of
40mA typically, this results in 5mA average drive. The common
cathode drive capability is approximately one-half that of the
common anode drive. If high impedance LED displays are used,
the drive current will be correspondingly less.
Inter Digit Blanking
A blanking time of approximately 10µs occurs between digit
strobes. This ensures that the segment information is correct
before the next digit drive, thereby avoiding display ghosting.
Driving Larger Displays
If a higher average drive current per digit is required, it is possible
to connect digit drive outputs together. For example, by paralleling
pairs of digit drivers together to drive a 4 digit display, 5mA
average segment drive current can be obtained.
Power Dissipation Considerations
Assuming common anode drive at V
DD
= 5V and all digits on
with an average of 5 segments driven per digit, the average
current would be approximately 200mA. Assuming a 1.8V
drop across the LED display, there will be a 3.2V drop across
the ICM7218. The device power dissipation will therefore be
640mW, rising to about 900mW, for all ‘8’ ‘s displayed.
Caution: Position device in system such that air can flow freely
to provide maximum cooling. The common cathode
dissipation is approximately one-half that of the common
anode dissipation.
Sequential Addressing Considerations
(lCM7218A/B)
The control instructions are read from the input bus lines if MODE
is high and WRITE
low. The instructions occur on 4 lines and are -
DECODE/no Decode, type of Decode (if desired), SHUTDOWN/no
Shutdown and DATA COMlNG/not Coming. After the control word
has been written (with the Data Coming instruction), display data
can be written into memory with each successive negative going
WRITE
pulse. After all 8-digit memory locations have been written
to, additional transitions of the WRITE
input are ignored until a
new control word is written. It is not possible to change one
individual digit without refreshing the data for all the other digits.
Random Access Input Drive
Considerations (ICM7218C/D)
Control instructions are provided to the ICM7218C/D by a
single three level input terminal (Pin 9), which operates
independently of the WRITE
pulse.
Data can be written into memory on the lCM7218C/D by
setting up a 3 bit binary code (one of eight) on the digit
address inputs and applying a low level to the WRITE
pin. For
example, it is possible to change only digit 7 without altering
the data for the other digits (See Figure 6 on page 8
).
Supply Capacitor
A 0.1µF plus a 47µF capacitor is recommended between V
DD
and V
SS
to bypass display multiplexed noise.
TABLE 1.
Input Data: ID7 lD6 ID5 lD4 lD3 lD2 lD1 ID0
Output Segments: D.P.
abcegfd
TABLE 2.
DECIMAL 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
HEXA
CODE
01234567 8 9 A B C D E F
CODE B 01234567 8 9 - E H L P (BLANK)
