74LCX32TTR

74LCX32
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AC ELECTRICAL CHARACTERISTICS
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW (t
OSLH
= | t
PLHm
- t
PLHn
|, t
OSHL
= | t
PHLm
- t
PHLn
|)
2) Parameter guaranteed by design
CAPACITIVE CHARACTERISTICS
1) C
PD
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
/4 (per gate)
TEST CIRCUIT
C
L
= 50 pF or equivalent (includes jig and probe capacitance)
R
L
= 500 or equivalent
R
T
= Z
OUT
of pulse generator (typically 50)
Symbol Parameter
Test Condition Value
Unit
V
CC
(V)
C
L
(pF)
R
L
()
t
s
= t
r
(ns)
-40 to 85 °C -55 to 125 °C
Min. Max. Min. Max.
t
PLH
t
PHL
Propagation Delay
Time
2.7
50 500 2.5
6.0 6.9
ns
3.0 to 3.6 1.0 5.2 6.0
t
OSLH
t
OSHL
Output To Output
Skew Time (note1,
2)
3.0 to 3.6 50 500 2.5 1.0 1.0 ns
Symbol Parameter
Test Condition Value
Unit
V
CC
(V)
T
A
= 25 °C
Min. Typ. Max.
C
IN
Input Capacitance
3.3
V
IN
= 0 to V
CC
5pF
C
PD
Power Dissipation Capacitance
(note 1)
3.3 f
IN
= 10MHz
V
IN
= 0 or V
CC
41
pF
74LCX32
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WAVEFORM : PROPAGATION DELAYS (f=1MHz; 50% duty cycle)
74LCX32
6/8
DIM.
mm. inch
MIN. TYP MAX. MIN. TYP. MAX.
A 1.75 0.068
a1 0.1 0.2 0.003 0.007
a2 1.65 0.064
b 0.35 0.46 0.013 0.018
b1 0.19 0.25 0.007 0.010
C 0.5 0.019
c1 45° (typ.)
D 8.55 8.75 0.336 0.344
E 5.8 6.2 0.228 0.244
e 1.27 0.050
e3 7.62 0.300
F 3.8 4.0 0.149 0.157
G 4.6 5.3 0.181 0.208
L 0.5 1.27 0.019 0.050
M 0.68 0.026
S8° (max.)
SO-14 MECHANICAL DATA
PO13G

74LCX32TTR

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
Logic Gates Quad 2-Input OR Gate
Lifecycle:
New from this manufacturer.
Delivery:
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