NLV74HC157ADTR2G

© Semiconductor Components Industries, LLC, 2014
August, 2014 − Rev. 12
1 Publication Order Number:
MC74HC157A/D
MC74HC157A
Quad 2-Input Data
Selectors/Multiplexers
High−Performance Silicon−Gate CMOS
The MC74HC157A is identical in pinout to the LS157. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
This device routes 2 nibbles (A or B) to a single port (Y) as
determined by the Select input. The data is presented at the outputs in
noninverted form. A high level on the Output Enable input sets all four
Y outputs to a low level.
Features
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 mA
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: 82 FETs or 20.5 Equivalent Gates
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
2
5
11
14
3
6
10
13
4
7
9
12
1
15
A0
A1
A2
A3
B0
B1
B2
B3
Y0
Y1
Y2
Y3
SELECT
OUTPUT
ENABLE
DATA
OUTPUTS
NIBBLE
A INPUTS
NIBBLE
B INPUTS
PIN 16 = V
CC
PIN 8 = GND
Figure 1. Logic Diagram
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
ORDERING INFORMATION
MARKING DIAGRAMS
SOIC−16
D SUFFIX
CASE 751B
TSSOP−16
DT SUFFIX
CASE 948F
1
16
HC157AG
AWLYWW
HC
157A
ALYWG
G
1
16
A = Assembly Location
L, WL = Wafer Lot
Y, YY = Year
W, WW = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
SOIC−16 TSSOP−16
PIN ASSIGNMENT
13
14
15
16
9
10
11
125
4
3
2
1
8
7
6
SELECT
Y0
B0
A0
Y1
B1
A1
GND
Y3
B3
A3
OUTPUT
ENABLE
V
CC
B2
A2
Y2
FUNCTION TABLE
Inputs
Output Outputs
Enable Select Y0 − Y3
X = don’t care
A0−A3, B0−B3 = the levels of
the respective Data−Word
Inputs.
H
L
L
X
L
H
L
A0A3
B0B3
MC74HC157A
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2
MAXIMUM RATINGS
Symbol Parameter Value Unit
V
CC
DC Supply Voltage (Referenced to GND) –0.5 to +7.0 V
V
in
DC Input Voltage (Referenced to GND) –0.5 to V
CC
+ 0.5 V
V
out
DC Output Voltage (Referenced to GND) –0.5 to V
CC
+ 0.5 V
I
in
DC Input Current, per Pin ±20 mA
I
out
DC Output Current, per Pin ±25 mA
I
CC
DC Supply Current, V
CC
and GND Pins ±50 mA
P
D
Power Dissipation in Still Air, SOIC Package†
TSSOP Package†
500
450
mW
T
stg
Storage Temperature – 65 to + 150
_C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds
(SOIC or TSSOP Package)
260
_C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of
these limits are exceeded, device functionality should not be assumed, damage may occur and
reliability may be affected.
Derating: SOIC Package: –7 mW/_C from 65_ to 125_C
TSSOP Package: −6.1 mW/_C from 65_ to 125_C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
CC
DC Supply Voltage (Referenced to GND) 2.0 6.0 V
V
in
, V
out
DC Input Voltage, Output Voltage
(Referenced to GND)
0 V
CC
V
T
A
Operating Temperature, All Package Types –55 +125
_C
t
r
, t
f
Input Rise and Fall Time V
CC
= 2.0 V
(Figure 1) V
CC
= 4.5 V
V
CC
= 6.0 V
0
0
0
1000
500
400
ns
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high−impedance cir-
cuit. For proper operation, V
in
and
V
out
should be constrained to the
range GND v (V
in
or V
out
) v V
CC
.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or V
CC
).
Unused outputs must be left open.
MC74HC157A
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3
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Guaranteed Limit
Symbol Parameter Test Conditions
V
CC
V
–55 to
25_C
v 85_C v 125_C
Unit
V
IH
Minimum High−Level Input
Voltage
V
out
= V
CC
– 0.1 V
|I
out
| v 20 mA
2.0
3.0
4.5
6.0
1.5
2.1
3.15
4.2
1.5
2.1
3.15
4.2
1.5
2.1
3.15
4.2
V
V
IL
Maximum Low−Level Input
Voltage
V
out
= 0.1 V
|I
out
| v 20 mA
2.0
3.0
4.5
6.0
0.5
0.9
1.35
1.8
0.5
0.9
1.35
1.8
0.5
0.9
1.35
1.8
V
V
OH
Minimum High−Level Output
Voltage
V
in
= V
IH
|I
out
| v 20 mA
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
V
V
in
= V
IH
|I
out
| v 2.4 mA
|I
out
| v 6.0 mA
|I
out
| v 7.8 mA
3.0
4.5
6.0
2.48
3.98
5.48
2.34
3.84
5.34
2.2
3.7
5.2
V
OL
Maximum Low−Level Output
Voltage
V
in
= V
IL
|I
out
| v 20 mA
2.0
4.5
6.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
V
in
= V
IL
|I
out
| v 2.4 mA
|I
out
| v 6.0 mA
|I
out
| v 7.8 mA
3.0
4.5
6.0
0.26
0.26
0.26
0.33
0.33
0.33
0.4
0.4
0.4
I
in
Maximum Input Leakage Current V
in
= V
CC
or GND 6.0 ±0.1 ±1.0 ±1.0
mA
I
OZ
Maximum Three−State Leakage
Current
Output in High−Impedance State
V
in
= V
IL
or V
IH
V
out
= V
CC
or GND
6.0 ±0.5 ±5.0 ±10
mA
I
CC
Maximum Quiescent Supply
Current (per Package)
V
in
= V
CC
or GND
I
out
= 0 mA
6.0 4.0 40 160
mA
AC ELECTRICAL CHARACTERISTICS (C
L
= 50 pF, Input t
r
= t
f
= 6.0 ns)
Symbo
l
Parameter
V
CC
V
Guaranteed Limit
Unit
–55 to
25_C
v 85_C v 125_C
t
PLH
,
t
PHL
Maximum Propagation Delay, Input A or B to Output Y
(Figures 1 and 4)
2.0
3.0
4.5
6.0
105
65
21
18
130
85
26
22
160
115
32
27
ns
t
PLH
,
t
PHL
Maximum Propagation Delay, Select to Output Y
(Figures 2 and 4)
2.0
3.0
4.5
6.0
110
70
22
19
140
90
28
24
165
115
33
28
ns
t
PLH
,
t
PHL
Maximum Propagation Delay, Output Enable to Output Y
(Figures 3 and 4)
2.0
3.0
4.5
6.0
100
60
20
17
125
80
25
21
150
110
30
26
ns
t
TLH
,
t
THL
Maximum Output Transition Time, Any Output
(Figures 1 and 4)
2.0
3.0
4.5
6.0
75
27
15
13
95
32
19
16
110
36
22
19
ns
C
in
Maximum Input Capacitance 10 10 10 pF
C
PD
Power Dissipation Capacitance (Per Package)*
Typical @ 25°C, V
CC
= 5.0 V
pF
33
* Used to determine the no−load dynamic power consumption: P
D
= C
PD
V
CC
2
f + I
CC
V
CC
.

NLV74HC157ADTR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Encoders, Decoders, Multiplexers & Demultiplexers DATA SELECTOR/MULTIP
Lifecycle:
New from this manufacturer.
Delivery:
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