MC74VHC595DR2G

MC74VHC595
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4
FUNCTION TABLE
Operation
Inputs Resulting Function
Reset
(SCLR
)
Serial
Input
(SI)
Shift
Clock
(SCK)
Reg
Clock
(RCK)
Output
Enable
(OE)
Shift
Register
Contents
Storage
Register
Contents
Serial
Output
(SQH)
Parallel
Outputs
(QA − QH)
Clear shift register L X X L, H, L L U L U
Shift data into shift
register
H D L, H, L DSR
A
;
SR
N
SR
N+1
U SR
G
SR
H
U
Registers remains
unchanged
H X L, H, X L U ** U **
Transfer shift register
contents to storage
register
H X L, H, L U SR
N
³STR
N
* SR
N
Storage register remains
unchanged
X X X L, H, L * U * U
Enable parallel outputs X X X X L * ** * Enabled
Force outputs into high
impedance state
X X X X H * ** * Z
SR = shift register contents D = data (L, H) logic level = High−to−Low * = depends on Reset and Shift Clock inputs
STR = storage register contents U = remains unchanged = Low−to−High ** = depends on Register Clock input
MAXIMUM RATINGS*
Symbol Parameter Value Unit
V
CC
DC Supply Voltage – 0.5 to + 7.0 V
V
in
DC Input Voltage – 0.5 to + 7.0 V
V
out
DC Output Voltage – 0.5 to V
CC
+ 0.5 V
I
IK
Input Diode Current − 20 mA
I
OK
Output Diode Current ± 20 mA
I
out
DC Output Current, per Pin ± 25 mA
I
CC
DC Supply Current, V
CC
and GND Pins ± 50 mA
P
D
Power Dissipation in Still Air, SOIC Packages†
TSSOP Package†
500
450
mW
T
stg
Storage Temperature – 65 to + 150
_C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of
these limits are exceeded, device functionality should not be assumed, damage may occur and
reliability may be affected.
Derating SOIC Packages: – 7 mW/_C from 65_ to 125_C
TSSOP Package: − 6.1 mW/_C from 65_ to 125_C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
CC
DC Supply Voltage 2.0 5.5 V
V
in
DC Input Voltage 0 5.5 V
V
out
DC Output Voltage 0 V
CC
V
T
A
Operating Temperature, All Package Types − 55 + 125
_C
t
r
, t
f
Input Rise and Fall Time V
CC
= 3.3V ±0.3V
V
CC
=5.0V ±0.5V
0
0
100
20
ns/V
Functional operation above the stresses listed in the Recommended Operating Ranges is not
implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may
affect device reliability.
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high−impedance cir-
cuit. For proper operation, V
in
and
V
out
should be constrained to the
range GND v (V
in
or V
out
) v V
CC
.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or V
CC
).
Unused outputs must be left open.
MC74VHC595
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5
The q
JA
of the package is equal to 1/Derating. Higher junction temperatures may affect the expected lifetime of the device per the table and
figure below.
DEVICE JUNCTION TEMPERATURE VERSUS
TIME TO 0.1% BOND FAILURES
Junction
Temperature °C
Time, Hours Time, Years
80 1,032,200 117.8
90 419,300 47.9
100 178,700 20.4
110 79,600 9.4
120 37,000 4.2
130 17,800 2.0
140 8,900 1.0
1
1 10 100
1000
TIME, YEARS
NORMALIZED FAILURE RATE
T
J
= 80
C°
T
J
= 90
C°
T
J
= 100 C°
T
J
= 110 C°
T
J
= 130 C°
T
J
= 120 C°
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
Figure 1. Failure Rate vs. Time
Junction Temperature
DC ELECTRICAL CHARACTERISTICS
Symbo
l
Parameter Test Conditions
V
CC
(V)
T
A
= 25°C T
A
= 85°C T
A
= 125°C
Uni
t
Min Typ Max Min Max Min Max
V
IH
Minimum High−Level
Input Voltage
2.0
3.0
4.5
5.5
1.5
2.1
3.15
3.85
1.5
2.1
3.15
3.85
1.5
2.1
3.15
3.85
V
V
IL
Maximum Low−Level
Input Voltage
2.0
3.0
4.5
5.5
0.59
0.9
1.35
1.65
0.59
0.9
1.35
1.65
0.59
0.9
1.35
1.65
V
V
OH
Minimum High−Leve
l
Output Voltage
V
IN
= V
IH
or V
IL
V
IN
= V
IH
or V
IL
I
OH
= − 50 μA
2.0
3.0
4.5
1.9
2.9
4.4
2.0
3.0
4.5
1.9
2.9
4.4
1.9
2.9
4.4
V
V
IN
= V
IH
or V
IL
I
OH
= −4 mA
I
OH
= −8 mA
3.0
4.5
2.58
3.94
2.48
3.80
2.34
3.66
V
OL
Maximum Low−Leve
l
Output Voltage
V
IN
= V
IH
or V
IL
V
IN
= V
IH
or V
IL
I
OL
= 50 μA
2.0
3.0
4.5
0.0
0.0
0.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
V
IN
= V
IH
or V
IL
I
OL
= 4 mA
I
OL
= 8 mA
3.0
4.5
0.36
0.36
0.44
0.44
0.52
0.52
I
IN
Maximum Input
Leakage Current
V
IN
= 5.5 V or GND 0 to
5.5
± 0.1 ± 1.0 ± 1.0 μA
I
CC
Maximum Quiescent
Supply Current
V
IN
= V
CC
or GND 5.5 4.0 40.0 40.0 μA
I
OZ
Three−State Output
Off−State Current
V
IN
= V
IH
or V
IL
V
OUT
= V
CC
or
GND
5.5 ± 0.25 ± 2.5 ± 2.5 μA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
MC74VHC595
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6
AC ELECTRICAL CHARACTERISTICS (Input t
r
= t
f
= 3.0ns)
Symbo
l
Parameter Test Conditions
T
A
= 25°C T
A
= 85°C T
A
= 125°C
Uni
t
Min Typ Max Min Max Min Max
f
max
Maximum Clock
Frequency (50%
Duty Cycle)
V
CC
= 3.3 ± 0.3 V 80 150 70 70
MHz
V
CC
= 5.0 ± 0.5 V 135 185 115 115
t
PLH
,
t
PHL
Propagation
Delay, SCK to
SQH
V
CC
= 3.3 ± 0.3 V C
L
= 15pF
C
L
= 50pF
8.8
11.3
13.0
16.5
1.0
1.0
15.0
18.5
1.0
1.0
15.0
18.5
ns
V
CC
= 5.0 ± 0.5 V C
L
= 15pF
C
L
= 50pF
6.2
7.7
8.2
10.2
1.0
1.0
9.4
11.4
1.0
1.0
9.4
11.4
t
PHL
Propagation
Delay,
CPLR to SQH
V
CC
= 3.3 ± 0.3 V C
L
= 15pF
C
L
= 50pF
8.4
10.9
12.8
16.3
1.0
1.0
13.7
17.2
1.0
1.0
13.7
17.2
ns
V
CC
= 5.0 ± 0.5 V C
L
= 15pF
C
L
= 50pF
5.9
7.4
8.0
10.0
1.0
1.0
9.1
11.1
1.0
1.0
9.1
11.1
t
PLH
,
t
PHL
Propagation
Delay, RCK to
QA−QH
V
CC
= 3.3 ± 0.3 V C
L
= 15pF
C
L
= 50pF
7.7
10.2
11.9
15.4
1.0
1.0
13.5
17.0
1.0
1.0
13.5
17.0
ns
V
CC
= 5.0 ± 0.5 V C
L
= 15pF
C
L
= 50pF
5.4
6.9
7..4
9.4
1.0
1.0
8.5
10.5
1.0
1.0
8.5
10.5
t
PZL
,
t
PZH
Output Enable
Time,
OE to QA−QH
V
CC
= 3.3 ± 0.3 V C
L
= 15pF
R
L
= 1 kW C
L
= 50pF
7.5
9.0
11.5
15.0
1.0
1.0
13.5
17.0
1.0
1.0
13.5
17.0
ns
V
CC
= 5.0 ± 0.5 V C
L
= 15pF
R
L
= 1 kW C
L
= 50pF
4.8
8.3
8.6
10.6
1.0
1.0
10.0
12.0
1.0
1.0
10.0
12.0
t
PLZ
,
t
PHZ
Output Disable
Time,
OE to QA−QH
V
CC
= 3.3 ± 0.3 V C
L
= 50pF
R
L
= 1 kW
12.1 15.7 1.0 16.2 1.0 16.2
ns
V
CC
= 5.0 ± 0.5 V C
L
= 50pF
R
L
= 1 kW
7.6 10.3 1.0 11.0 1.0 11.0
C
IN
Input Capacitance 4 10 10 10 pF
C
OUT
Three−State
Output
Capacitance
(Output in
High−Impedance
State), QA−QH
6 10 10 pF
C
PD
Power Dissipation Capacitance (Note 1)
Typical @ 25°C, V
CC
= 5.0V
pF
87
1. C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I
CC(OPR
)
= C
PD
V
CC
f
in
+ I
CC
. C
PD
is used to determine the no−load dynamic
power consumption; P
D
= C
PD
V
CC
2
f
in
+ I
CC
V
CC
.
NOISE CHARACTERISTICS (Input t
r
= t
f
= 3.0ns, C
L
= 50pF, V
CC
= 5.0V)
Symbo
l
Characteristic
T
A
= 25°C
Uni
t
Typ Max
V
OLP
Quiet Output Maximum Dynamic V
OL
0.8 1.0 V
V
OLV
Quiet Output Minimum Dynamic V
OL
− 0.8 − 1.0 V
V
IHD
Minimum High Level Dynamic Input Voltage 3.5 V
V
ILD
Maximum Low Level Dynamic Input Voltage 1.5 V

MC74VHC595DR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Counter Shift Registers 8BIT 3-STATE OUTPUTS
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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