C8051T60x-DK
Rev. 0.1 7
7.1. System Clock Sources
The C8051T60x devices feature a calibrated internal oscillator which is enabled as the system clock source on
reset. After reset, the internal oscillator operates at a frequency of 24.5 MHz (±2%) by default, but may be
configured by software to operate at other frequencies. Therefore, in many applications an external oscillator is not
required. However, if you wish to operate the C8051T60x device at a frequency not available with the internal
oscillator, an external oscillator source may be used. Refer to the C8051T60x datasheet for more information on
configuring the system clock source.
The main board is designed to facilitate the use of external clock sources. To use an external CMOS clock source,
the clock can simply be applied to P0.3. To implement the RC mode option, placeholders for an 0805-packaged
capacitor (C20) and resistor (R18) are supplied on the board. The C (capacitor) clock option can be implemented
by using only the capacitor placeholder (C20). To reduce the amount of stray capacitance on the pin, which could
affect the frequency in either RC or C mode, resistor R12 can also be removed from the board when using C or RC
mode. Refer to the C8051T60x datasheet for more information on the use of external oscillators.
7.2. Switches, LEDs and Potentiometer
Two switches are provided on the main board. Switch RESET is connected to the RESET pin of the C8051T60x.
Pressing RESET puts the device into its hardware-reset state. Switch P0.3 can be connected to the C8051T60x’s
general purpose I/O (GPIO) pin through header J3. Pressing Switch P0.3 generates a logic low signal on the port
pin. Remove the shorting block from the J3 header to disconnect Switch P0.3 from the port pin.
Four LEDs are also provided on the target board. The red LED labeled PWR (D4) is used to indicate a power
connection to the target board. The red/green LED labeled D2 is the run/stop light for the debug circuitry. The red
LED labeled D7 indicates when the VPP programming voltage is being applied to the device (see Section 7.7 for
additional details). Finally, the green LED labeled P0.6 (D1) can be connected to the C8051T60x’s GPIO pin
through header J3. Remove the shorting block from the header to disconnect the LED from the port pin.
Also included on the C8051T60x main board is a 10 k thumb-wheel rotary potentiometer, reference number R13.
The potentiometer can be connected to the C8051T60x’s P0.1 pin through the J7 header. Remove the shorting
block from the header to disconnect the potentiometer from the port pin.
See Table 1 for the port pins and headers corresponding to the switches, LEDs, and potentiometer.
7.3. USB Debug Interface (DEBUG / J1)
A Universal Serial Bus (USB) connector (J1) is included to provide the on-board debug and programming interface.
The debug/programming interface is powered through the USB connector, but requires power to the device via the
power connector P3 to be fully functional.
Table 1. Target Board I/O Descriptions
Description I/O Header
SW1 P0.3 J3[5–6]
SW2 RESET none
Red LED PWR none
Green LED P0.6 J3[7–8]
Red/Green LED none none
Red LED VPP J10
Potentiometer P0.1 J7
C8051T60x-DK
8 Rev. 0.1
7.4. PORT I/O Connector (J8)
Each of the C8051T60x’s I/O pins, as well as VPP, +3VD, GND, and /RST are routed to header J8. This header
can be used to easily connect to any signal on the device. Table 2 defines the pins for header J8.
7.5. Serial Interface (J2)
A RS232 transceiver circuit and DB-9 (J2) connector are provided on the main board to facilitate serial connections
to UART0 on the C8051T60x. The TX and RX signals of UART0 may be connected to the RS-232 transceiver by
installing shorting blocks on header J3. The RTS and CTS lines do not have a direct connection available to the
C8051T60x, due to limited pin resources on the device. However, these two signals have also been routed through
the transceiver, and are available for wiring on-board at test points near the DB-9 connector. The transceiver shifts
the UART signals to RS-232 levels, and connects to the appropriate pins on the DB-9 connector.
J3[1–2] - Install shorting block to connect UART0 RX (P0.5) to transceiver.
J3[3–4] - Install shorting block to connect UART0 TX (P0.4) to transceiver.
7.6. Analog I/O (J6)
Two of the C8051T60x target device’s port pins are connected to the J6 terminal block. Refer to Table 3 for the J6
terminal block connections.
Table 2. J8 Pin Descriptions
Pin # Description
1 +3VD (+3.3 VDC)
2VPP
3P0.0
4P0.1
5P0.2
6P0.3
7P0.4
8P0.5
9P0.6
10 P0.7
11 GND
12 /RST
Table 3. J6 Terminal Block Pin Descriptions
Pin # Description
1 GND (Ground)
2 P0.1/AIN1
3 P0.0/VREF
4VDD
C8051T60x-DK
Rev. 0.1 9
7.7. VPP Connection (J10)
The C8051T60x devices require a special 6.5 V programming voltage applied to the VPP pin during device
programming. The VPP pin on these devices is shared with P0.2. During programming, the VPP voltage is
automatically enabled when needed. Header J10 is provided to allow the user to disconnect the programming
circuitry from the VPP/P0.2 pin to avoid interfering with the normal application operation of P0.2. When
programming the device, J10 should be shorted with a shorting block. When running normal application code, J10
can be removed. Note that the C8051T600 Emulation Daughter Board does not connect the main board’s VPP and
P0.2 signals, so removing the shorting block is not necessary when using the Emulation Daughter Board.
7.8. Using Alternate Supplies with the C8051T60x Development Kit
For most evaluation purposes, the on-board 3.3 V supply regulator is sufficient to be used as a VDD power supply.
However, in applications where a different supply voltage is desired (for example, 1.8 V), an external supply
voltage can be applied to the board at the analog connector (J6). Depending on the supply and the desired
functionality of the board, it may be necessary to cut the VDD supply voltage trace on the back of the board behind
header J9 (not populated). The following should be considered when supplying a different voltage to the device:
1. When programming a C8051T60x device
: The on-board 3.3 V regulator should be used for VDD.
2. If a VDD supply voltage between 2.7 and 3.6 V is desired
: The ac to dc power adapter should be disconnected
from P3, and the desired supply voltage can be applied directly to the GND and VDD terminals of terminal block
J6. No board modification is necessary.
3. If a VDD supply voltage between 1.8 and 2.7 V is desired and RS-232 functionality is not required
: The ac to dc
power adapter should be disconnected from P3, and the desired supply voltage can be applied directly to the
GND and VDD terminals of terminal block J6. No board modification is necessary.
4. If a VDD supply voltage between 1.8 and 2.7 V is desired and RS-232 functionality is required
: The RS-232
transceiver is not specified to operate below 2.7 V. In this case, the trace under header J9 should be cut. Then,
the desired VDD supply voltage can be applied directly to the GND and VDD terminals of terminal block J6, and
the ac to dc power adapter can be connected to P3, to provide 3.3 V to the RS-232 transceiver. In this case, it
may also be necessary to configure the TX pin on the device for open-drain mode, and add a pull-up resistor to
the supply of the transceiver.

C8051T600DK

Mfr. #:
Manufacturer:
Silicon Labs
Description:
Development Boards & Kits - 8051 Development Kit for C8051T60x MCUs
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New from this manufacturer.
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