ams Datasheet Page 13
[v2-06] 2014-Oct-14 Document Feedback
AS5055A − SPI Interface
Figure 13:
SPI Timing
Note(s) and/or Footnote(s):
1. If the previous command was a READ ANGLE command (0x3FFF) a minimum time of readout has to be waited before sending a next
READ ANGLE command. (see Operating Modes” on page 10)
SPI Wire Mode Selection
The SPI interface can be set in two different modes: 3-wire mode
or 4-wire mode.
Figure 14:
Wire Mode Selection
Parameter Description Min Max Unit
t
L
Time between CSn falling edge and CLK rising edge 50 ns
t
clk
Serial clock period 100 ns
t
clkL
Low period of serial clock 50 ns
t
clkH
High period of serial clock 50 ns
t
H
Time between last falling edge of CLK and rising edge
of CSn
50 ns
t
CSn
High time of CSn between two transmissions
(1)
50 ns
t
MOSI
Data input valid to falling clock edge 20 ns
t
MISO
CLK edge to data output valid 35 ns
t
OZ
Release bus time after CS rising edge. 50 ns
WM (Pin 14) Connection option
03-wire mode
14-wire-mode
Page 14 ams Datasheet
Document Feedback [v2-06] 2014-Oct-14
AS5055A − SPI Interface
SPI Transaction
An SPI transaction consists of a 16-bit command frame followed
by a 16-bit data frame. Figure 15 shows the structure of the
command frame.
SPI Command Frame
Figure 15:
SPI Command Frame
To increase the reliability of communication over the SPI, an
even parity bit (PAR) must be generated and sent. A wrong
setting of the parity bit causes the PARITY bit in the error status
register of the AS5055A to be set. The parity bit is calculated
from the upper 15-bits of the command frame. The 16-bit
command specifies the address and whether the transaction is
a read or a write.
Bit 15 1413121110987654321 0
R/W Address 14:1 PAR
Bit Name Description
15 R/W 0=Write, 1=Read
14:1 Address 14 bit address to read or write
0 PAR Parity bit (even) calculated on the upper 15 bits
ams Datasheet Page 15
[v2-06] 2014-Oct-14 Document Feedback
AS5055A − SPI Interface
SPI Read Data Frame
Figure 16:
SPI Read Data Frame
The data is sent from the AS5055A to the microcontroller on the
MISO output. The parity bit PAR is calculated for the upper 15
bits. If an error is detected in the previous SPI command frame,
the EF bit is set. The addressed register is sampled on the rising
edge of CSn and the data is transmitted on MISO with the next
read command, as shown in Figure 17.
Figure 17:
SPI Read
Bit 15 1413121110 9 8 7 6 5 4 3 2 1 0
Data 15:2 EF PAR
Bit Name Description
15:2 Data 14 bit read data
1 EF 0 = no command frame error occurred, 1 = error occurred
0 PAR Parity bit (even) calculated on the upper 15 bits
Read ADD[n] Read ADD[k]
CSn
Read ADD[p]
Data ADD[n] Data ADD[p]
Read ADD[m]
Data ADD[k]
Command CommandCommand Command
Data DataData
MOSI
MISO

AS5055A-BQFT

Mfr. #:
Manufacturer:
ams
Description:
Magnetic Sensors Board Mount Hall Effect / Magnetic Sensors 12B Rotary Position Sensor (Encoder)
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet