ADM8660ARZ-REEL Datasheet ADM8660ANZ, ADM660ARUZ, ADM660ARZ | P7-P9

REV.

ADM660/ADM8660

–7–

TEMPERATURE – C

CHARGE-PUMP FREQUENCY – kHz

–40 100–20 0 20 406080

160

140

120

100

LV = GND

FC = V+

C1, C2 = 2.2␮F

TPC 13. Charge-Pump Frequency vs. Temperature

TEMPERATURE – C

OUTPUT SOURCE RESISTANCE – ⍀

–40 100–20 0 20 406080

V+ = +1.5V

V+ = +3V

V+ = +5V

TPC 14. Output Resistance vs. Temperature

GENERAL INFORMATION

The ADM660/ADM8660 is a switched capacitor voltage con-

verter that can be used to invert the input supply voltage. The

ADM660 can also be used in a voltage doubling mode. The

voltage conversion task is achieved using a switched capacitor

technique using two external charge storage capacitors. An on-

board oscillator and switching network transfers charge between

the charge storage capacitors. The basic principle behind the

voltage conversion scheme is illustrated in Figures 1 and 2.

V+

CAP+

CAP–

OUT = –V+

Φ1 Φ2

+ 2

OSCILLATOR

Figure 1. Voltage Inversion Principle

V+

CAP+

CAP–

C1 C2

OUT

= 2V+

Φ1 Φ2

+ 2

OSCILLATOR

V+

Figure 2. Voltage Doubling Principle

Figure 1 shows the voltage inverting configuration, while Figure 2

shows the configuration for voltage doubling. An oscillator

generating antiphase signals φ1 and φ2 controls switches S1, S2,

and S3, S4. During φ1, switches S1 and S2 are closed charging

C1 up to the voltage at V+. During φ2, S1 and S2 open and S3

and S4 close. With the voltage inverter configuration during φ2,

the positive terminal of C1 is connected to GND via S3 and the

negative terminal of C1 connects to V

OUT

via S4. The net result

is voltage inversion at V

OUT

wrt GND. Charge on C1 is trans-

ferred to C2 during φ2. Capacitor C2 maintains this voltage

during φ1. The charge transfer efficiency depends on the on-

resistance of the switches, the frequency at which they are being

switched, and also on the equivalent series resistance (ESR) of

the external capacitors. The reason for this is explained in the

following section. For maximum efficiency, capacitors with low

ESR are, therefore, recommended.

The voltage doubling configuration reverses some of the con-

nections, but the same principle applies.

Switched Capacitor Theory of Operation

As already described, the charge pump on the ADM660/ADM8660

uses a switched capacitor technique in order to invert or double

the input supply voltage. Basic switched capacitor theory is

discussed below.

A switched capacitor building block is illustrated in Figure 3.

With the switch in position A, capacitor C1 will charge to voltage

V1. The total charge stored on C1 is q1 = C1V1. The switch is

then flipped to position B discharging C1 to voltage V2. The

charge remaining on C1 is q2 = C1V2. The charge transferred

to the output V2 is, therefore, the difference between q1 and

q2, so ∆q = q1–q2 = C1 (V1–V2).

Figure 3. Switched Capacitor Building Block

As the switch is toggled between A and B at a frequency f, the

charge transfer per unit time or current is:

I = f (∆q) = f (C1)(V1–V 2)

Therefore,

I = (V1–V 2)/(1/ fC1) = (V1–V 2)/(R

)

where R

= 1/fC1

The switched capacitor may, therefore, be replaced by an equivalent

resistance whose value is dependent on both the capacitor size

and the switching frequency. This explains why lower capacitor

values may be used with higher switching frequencies. It should

be remembered that as the switching frequency is increased the

power consumption will increase due to some charge being lost

at each switching cycle. As a result, at high frequencies, the power

efficiency starts decreasing. Other losses include the resistance

of the internal switches and the equivalent series resistance (ESR)

of the charge storage capacitors.

= 1/fC1

C2 R

Figure 4. Switched Capacitor Equivalent Circuit

REV. –8–

ADM660/ADM8660

Table II. ADM8660 Charge-Pump Frequency Selection

FC OSC Charge Pump C1, C2

GND Open 25 kHz 10 µF

V+ Open 120 kHz 2.2 µF

GND or V+ Ext Cap See Typical Characteristics

GND Ext CLK Ext CLK Frequency/2

+1.5V TO +7V

INPUT

INVERTED

NEGATIVE

OUTPUT

ADM660

ADM8660

CAP+

GND

CAP–

V+

OSC

OUT

CLK OSC

CMOS GATE

Figure 7. ADM660/ADM8660 External Oscillator

Voltage Doubling Configuration

Figure 8 shows the ADM660 configured to generate increased

output voltages. As in the inverting mode, only two external

capacitors are required. The doubling function is achieved by

reversing some connections to the device. The input voltage is

applied to the GND pin and V+ is used as the output. Input

voltages from 2.5 V to 7 V are allowable. In this configuration,

pins LV, OUT must be connected to GND.

The unloaded output voltage in this configuration is 2 (V

Output resistance and ripple are similar to the voltage inverting

configuration.

Note that the ADM8660 cannot be used in the voltage

doubling configuration.

10␮F

DOUBLED

POSITIVE

OUTPUT

ADM660

CAP+

GND

CAP–

V+

OSC

OUT

10␮F

+2.5V

TO +7V

INPUT

Figure 8. Voltage Doubler Configuration

Shutdown Input

The ADM8660 contains a shutdown input that can be used to

disable the device and thus reduce the power consumption. A

logic high level on the SD input shuts the device down reducing

the quiescent current to 0.3 µA. During shutdown, the output

voltage goes to 0 V. Therefore, ground referenced loads are not

powered during this state. When exiting shutdown, it takes

several cycles (approximately 500 µs) for the charge pump to

reach its final value. If the shutdown function is not being used,

then SD should be hardwired to GND.

Capacitor Selection

The optimum capacitor value selection depends the charge-pump

frequency. With 25 kHz selected, 10 µF capacitors are recommended,

while with 120 kHz selected, 2.2 µF capacitors may be used.

Other frequencies allow other capacitor values to be used. For

maximum efficiency in all cases, it is recommended that capaci-

tors with low ESR are used for the charge-pump. Low ESR

capacitors give both the lowest output resistance and

lowest

ripple voltage. High output resistance degrades the overall

power

efficiency and causes voltage drops, especially at high output

Inverting Negative Voltage Generator

Figures 5 and 6 show the ADM660/ADM8660 configured to

generate a negative output voltage. Input supply voltages from

1.5 V up to 7 V are allowable. For supply voltage less than 3 V,

LV must be connected to GND. This bypasses the internal

regulator circuitry and gives best performance in low voltage

applications. With supply voltages greater than 3 V, LV may

be either connected to GND or left open. Leaving it open facili-

tates direct substitution for the ICL7660.

+1.5V TO +7V

INPUT

10␮F

INVERTED

NEGATIVE

OUTPUT

ADM660

CAP+

GND

CAP–

V+

OSC

OUT

Figure 5. ADM660 Voltage Inverter Configuration

+1.5V TO +7V

INPUT

10␮F

INVERTED

NEGATIVE

OUTPUT

ADM8660

CAP+

GND

CAP–

V+

OUT

SHUTDOWN

CONTROL

Figure 6. ADM8660 Voltage Inverter Configuration

OSCILLATOR FREQUENCY

The internal charge-pump frequency may be selected to be

either 25 kHz or 120 kHz using the Frequency Control (FC)

input. With FC unconnected (ADM660) or connected to GND

(ADM8660), the internal charge pump runs at 25 kHz while, if

FC is connected to V+, the frequency is increased by a factor of

five. Increasing the frequency allows smaller capacitors to be

used for equivalent performance or, if the capacitor size is un-

changed, it results in lower output impedance and ripple.

If a charge-pump frequency other than the two fixed values is

desired, this is made possible by the OSC input, which can

either have a capacitor connected to it or be overdriven by an

external clock. Refer to the Typical Performance Characteris-

tics, which shows the variation in charge-pump frequency versus

capacitor size. The charge-pump frequency is one-half the oscil-

lator frequency applied to the OSC pin.

If an external clock is used to overdrive the oscillator, its levels

should swing to within 100 mV of V+ and GND. A CMOS

driver is, therefore, suitable. When OSC is overdriven, FC has

no effect but LV must be grounded.

Note that overdriving is permitted only in the voltage inverter

configuration.

Table I. ADM660 Charge-Pump Frequency Selection

FC OSC Charge Pump C1, C2

Open Open 25 kHz 10 µF

V+ Open 120 kHz 2.2 µF

Open or V+ Ext Cap See Typical Characteristics

Open Ext CLK Ext CLK Frequency/2

REV.

ADM660/ADM8660

–9–

current levels. The ADM660/ADM8660 is tested using low

ESR, 10 µF, capacitors for both C1 and C2. Smaller values of

C1 increase the output resistance, while increasing C1 will

reduce the output resistance. The output resistance is also depen-

dent on the internal switches on resistance as well as the

capacitors ESR, so the effect of increasing C1 becomes negligible

past a certain point.

Figure 9 shows how the output resistance varies with oscillator

frequency for three different capacitor values. At low oscillator

frequencies, the output impedance is dominated by the 1/f

term. This explains why the output impedance is higher for

smaller capacitance values. At high oscillator frequencies, the

1/f

term becomes insignificant and the output impedance is

dominated by the internal switches on resistance. From an out-

put impedance viewpoint, therefore, there is no benefit to be

gained from using excessively large capacitors.

OSCILLATOR FREQUENCY – kHz

500

400

0.1 100110

300

200

100

C1 = C2 = 2.2␮F

C1 = C2 = 1␮F

C1 = C2 = 10␮F

OUTPUT RESISTANCE – ⍀

Figure 9. Output Impedance vs. Oscillator Frequency

Capacitor C2

The output capacitor size C2 affects the output ripple. Increas-

ing the capacitor size reduces the peak-to-peak ripple. The ESR

affects both the output impedance and the output ripple.

Reducing the ESR reduces the output impedance and ripple.

For convenience it is recommended that both C1 and C2 be the

same value.

Table III. Capacitor Selection

Charge-Pump Capacitor

Frequency C1, C2

25 kHz 10 µF

120 kHz 2.2 µF

Power Efficiency and Oscillator Frequency Trade-Off

While higher switching frequencies allow smaller capacitors to

be used for equivalent performance, or improved performance

with the same capacitors, there is a trade-off to consider. As the

oscillator frequency is increased, the quiescent current increases.

This happens as a result of a finite charge being lost at each

switching cycle. The charge loss per unit cycle at very high

frequencies can be significant, thereby reducing the power effi-

ciency. Since the power efficiency is also degraded at low oscillator

frequencies due to an increase in output impedance, this means

that there is an optimum frequency band for maximum power

transfer. Refer to the Typical Performance Characteristics section.

Bypass Capacitor

The ac impedance of the ADM660/ADM8660 may be reduced

by using a bypass capacitor on the input supply. This capacitor

should be connected between the input supply and GND. It

will provide instantaneous current surges as required. Suitable

capacitors of 0.1 µF or greater may be used.

P1-P3 P4-P6 P7-P9 P10-P11

ADM8660ARZ-REEL

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Switching Voltage Regulators CHARGE PUMPED INVERTER W/SHUTDOWN I.C.

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