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LTC3778EF#TRPBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24
10
LTC3778
3778f
APPLICATIO S I FOR ATIO
WUUU
The basic LTC3778 application circuit is shown in
Figure 1. External component selection is primarily de-
termined by the maximum load current and begins with
the selection of the sense resistance and power MOSFET
switches. The LTC3778 can use either a sense resistor or
the on-resistance of the synchronous power MOSFET for
determining the inductor current. The desired amount of
ripple current and operating frequency largely deter-
mines the inductor value. Finally, C
IN
is selected for its
ability to handle the large RMS current into the converter
and C
OUT
is chosen with low enough ESR to meet the
output voltage ripple and transient specification.
Maximum Sense Voltage and V
RNG
Pin
Inductor current is determined by measuring the voltage
across a sense resistance that appears between the SENSE
–
and SENSE
+
pins. The maximum sense voltage is set by
the voltage applied to the V
RNG
pin and is equal to
approximately (0.133)V
RNG
. The current mode control
loop will not allow the inductor current valleys to exceed
(0.133)V
RNG
/R
SENSE
. In practice, one should allow some
margin for variations in the LTC3778 and external compo-
nent values and a good guide for selecting the sense
resistance is:
R
V
I
SENSE
RNG
OUT MAX
=
10•
()
An external resistive divider from INTV
CC
can be used to
set the voltage of the V
RNG
pin between 0.5V and 2V
resulting in nominal sense voltages of 50mV to 200mV.
Additionally, the V
RNG
pin can be tied to SGND or INTV
CC
in which case the nominal sense voltage defaults to 70mV
or 140mV, respectively. The maximum allowed sense
voltage is about 1.33 times this nominal value.
Connecting the SENSE
+
and SENSE
–
Pins
The LTC3778 can be used with or without a sense resistor.
When using a sense resistor, it is placed between the
source of the bottom MOSFET, M2, and PGND. Connect
the SENSE
+
and SENSE
–
pins to the top and bottom of the
sense resistor. Using a sense resistor provides a well
defined current limit, but adds cost and reduces efficiency.
Alternatively, one can eliminate the sense resistor and use
the bottom MOSFET as the current sense element by
simply connecting the SENSE
+
pin to the SW pin and
SENSE
–
pin to PGND. This improves efficiency, but one
must carefully choose the MOSFET on-resistance as dis-
cussed below.
Power MOSFET Selection
The LTC3778 requires two external N-channel power
MOSFETs, one for the top (main) switch and one for the
bottom (synchronous) switch. Important parameters for
the power MOSFETs are the breakdown voltage V
(BR)DSS
,
threshold voltage V
(GS)TH
, on-resistance R
DS(ON)
, reverse
transfer capacitance C
RSS
and maximum current I
DS(MAX)
.
The gate drive voltage is set by the 5V INTV
CC
and DRV
CC
supplies. Consequently, logic-level threshold MOSFETs
must be used in LTC3778 applications. If the input voltage
or DRV
CC
voltage is expected to drop below 5V, then sub-
logic level threshold MOSFETs should be considered.
When the bottom MOSFET is used as the current sense
element, particular attention must be paid to its on-
resistance. MOSFET on-resistance is typically specified
with a maximum value R
DS(ON)(MAX)
at 25°C. In this case,
additional margin is required to accommodate the rise in
MOSFET on-resistance with temperature:
R
R
DS ON MAX
SENSE
T
()( )
=
ρ
11
LTC3778
3778f
APPLICATIO S I FOR ATIO
WUUU
The ρ
T
term is a normalization factor (unity at 25°C)
accounting for the significant variation in on-resistance
with temperature, typically about 0.4%/°C as shown in
Figure 2. For a maximum junction temperature of 100°C,
using a value ρ
T
= 1.3 is reasonable.
Operating Frequency
The choice of operating frequency is a tradeoff between
efficiency and component size. Low frequency operation
improves efficiency by reducing MOSFET switching losses
but requires larger inductance and/or capacitance in order
to maintain low output ripple voltage.
The operating frequency of LTC3778 applications is deter-
mined implicitly by the one-shot timer that controls the
on-time t
ON
of the top MOSFET switch. The on-time is set
by the current into the I
ON
pin and the voltage at the V
ON
pin according to:
t
V
I
pF
ON
VON
ION
= ()10
Tying a resistor R
ON
from V
IN
to the I
ON
pin yields an on-
time inversely proportional to V
IN
. For a step-down con-
verter, this results in approximately constant frequency
operation as the input supply varies:
f
V
VR pF
Hz
OUT
VON ON
=
()()
[]
10
To hold frequency constant during output voltage changes,
tie the V
ON
pin to V
OUT
. The V
ON
pin has internal clamps
that limit its input to the one-shot timer. If the pin is tied
below 0.7V, the input to the one-shot is clamped at 0.7V.
Similarly, if the pin is tied above 2.4V, the input is clamped
at 2.4V. If output is above 2.4V, use a resistive divider from
V
OUT
to V
ON
pin.
Because the voltage at the I
ON
pin is about 0.7V, the
current into this pin is not exactly inversely proportional to
V
IN
, especially in applications with lower input voltages.
To correct for this error, an additional resistor R
ON2
connected from the I
ON
pin to the 5V INTV
CC
supply will
further stabilize the frequency.
R
V
V
R
ON ON2
5
07
=
.
Changes in the load current magnitude will also cause
frequency shift. Parasitic resistance in the MOSFET
switches and inductor reduce the effective voltage across
the inductance, resulting in increased duty cycle as the
JUNCTION TEMPERATURE (°C)
–50
ρ
T
NORMALIZED ON-RESISTANCE
1.0
1.5
150
3778 F02
0.5
0
0
50
100
2.0
The power dissipated by the top and bottom MOSFETs
strongly depends upon their respective duty cycles and
the load current. When the LTC3778 is operating in
continuous mode, the duty cycles for the MOSFETs are:
D
V
V
D
VV
V
TOP
OUT
IN
BOT
IN OUT
IN
=
=
–
The resulting power dissipation in the MOSFETs at maxi-
mum output current are:
P
TOP
= D
TOP
I
OUT(MAX)
2
ρ
T(TOP)
R
DS(ON)(MAX)
+ k V
IN
2
I
OUT(MAX)
C
RSS
f
P
BOT
= D
BOT
I
OUT(MAX)
2
ρ
T(BOT)
R
DS(ON)(MAX)
Both MOSFETs have I
2
R losses and the top MOSFET
includes an additional term for transition losses, which are
largest at high input voltages. The constant k = 1.7A
–1
can
be used to estimate the amount of transition loss. The
bottom MOSFET losses are greatest when the bottom duty
cycle is near 100%, during a short-circuit or at high input
voltage.
Figure 2. R
DS(ON)
vs. Temperature
12
LTC3778
3778f
load current increases. By lengthening the on-time slightly
as current increases, constant frequency operation can be
maintained. This is accomplished with a resistive divider
from the I
TH
pin to the V
ON
pin and V
OUT
. The values
required will depend on the parasitic resistances in the
specific application. A good starting point is to feed about
25% of the voltage change at the I
TH
pin to the V
ON
pin as
shown in Figure 3a. Place capacitance on the V
ON
pin to
filter out the I
TH
variations at the switching frequency. The
resistor load on I
TH
reduces the DC gain of the error amp
and degrades load regulation, which can be avoided by
using the PNP emitter follower of Figure 3b.
this requires a large inductor. There is a tradeoff between
component size, efficiency and operating frequency.
A reasonable starting point is to choose a ripple current
that is about 40% of I
OUT(MAX)
. The largest ripple current
occurs at the highest V
IN
. To guarantee that ripple current
does not exceed a specified maximum, the inductance
should be chosen according to:
L
V
fI
V
V
OUT
LMAX
OUT
IN MAX
=
−
∆
() ()
1
Once the value for L is known, the type of inductor must be
selected. A variety of inductors designed for high current,
low voltage applications are available from manufacturers
such as Sumida, Panasonic, Coiltronics, Coilcraft and
Toko.
Schottky Diode D1 Selection
The Schottky diode D1 shown in Figure 1 conducts during
the dead time between the conduction of the power
MOSFET switches. It is intended to prevent the body diode
of the bottom MOSFET from turning on and storing charge
during the dead time, which can cause a modest (about
1%) efficiency loss. The diode can be rated for about one
half to one fifth of the full load current since it is on for only
a fraction of the duty cycle. In order for the diode to be
effective, the inductance between it and the bottom MOS-
FET must be as small as possible, mandating that these
components be placed adjacently. The diode can be omit-
ted if the efficiency loss is tolerable.
C
IN
and C
OUT
Selection
The input capacitance C
IN
is required to filter the square
wave current at the drain of the top MOSFET. Use a low
ESR capacitor sized to handle the maximum RMS current.
II
V
V
V
V
RMS OUT MAX
OUT
IN
IN
OUT
≅
()
–1
This formula has a maximum at V
IN
= 2V
OUT
, where
I
RMS
= I
OUT(MAX)
/2. This simple worst-case condition is
APPLICATIO S I FOR ATIO
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Figure 3. Correcting Frequency Shift with Load Current Changes
C
VON
0.01µF
R
VON2
10k
Q1
2N5087
R
VON1
3k
10k
C
C
3778 F03b
V
OUT
INTV
CC
R
C
V
ON
I
TH
LTC3778
(3b)
C
VON
0.01µF
R
VON2
100k
R
VON1
30k
C
C
3778 F03a
V
OUT
R
C
V
ON
I
TH
LTC3778
(3a)
Inductor Selection
Given the desired input and output voltages, the inductor
value and operating frequency determine the ripple
current:
∆=
−
I
V
fL
V
V
L
OUT OUT
IN
1
Lower ripple current reduces core losses in the inductor,
ESR losses in the output capacitors and output voltage
ripple. Highest efficiency operation is obtained at low
frequency with small ripple current. However, achieving
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24

LTC3778EF#TRPBF

Mfr. #:
Buy LTC3778EF#TRPBF
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Wide Operating Rng, No RSENSE Buck Cntr
Lifecycle:
New from this manufacturer.
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