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ADM1232ARM

P1-P3P4-P6P7-P9P10-P12P13-P13
ADM1232
Rev. C | Page 3 of 12
SPECIFICATIONS
V
CC
= full operating range, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
TEMPERATURE −40 +85 °C T
A
= T
MIN
to T
MAX
.
POWER SUPPLY
Voltage 4.5 5.0 5.5 V
Current 20 50 μA V
IL
, V
IH
= CMOS levels.
200 500 μA V
IL
, V
IH
= TTL levels.
STROBE AND PB RESET INPUTS
Input High Level 2.0 V
CC
+ 0.3 V
Input Low Level −0.3 +0.8 V
INPUT LEAKAGE CURRENT
(STROBE, TOLERANCE)
−1.0 +1.0 μA
TD 1.6 μA
OUTPUT CURRENT
RESET 8 10 mA V
CC
is at 4.5 V to 5.5 V.
RESET/RESET
−8 −12 mA V
CC
is at 4.5 V to 5.5 V.
OUTPUT VOLTAGE
RESET/RESET
V
CC
− 0.5 V
CC
− 0.1 V
When sourcing less than 500 μA, RESET remains within
0.5 V of V
CC
on power-down until V
CC
drops below 2.0 V.
When sinking less than 500 μA, RESET remains within
0.5 V of GND on power-down until V
CC
drops below 2.0 V.
RESET/RESET High Level
0.4 V
RESET/RESET Low Level
2.4 V
1 V OPERATION
RESET Output Voltage V
CC
− 0.1 V When sourcing less than 50 μA.
RESET Output Voltage
0.1 V When sinking less than 50 μA.
V
CC
TRIP POINT
5% 4.5 4.62 4.74 V TOLERANCE = GND.
10% 4.25 4.37 4.49 V TOLERANCE = V
CC
.
CAPACITANCE
Input (STROBE, TOLERANCE)
5 pF T
A
= 25°C.
Output (RESET, RESET)
7 pF T
A
= 25°C.
PB RESET
Time 20 ms
PB RESET
must be held low for a minimum of 20 ms to
guarantee a reset.
Delay 1 4 20 ms
RESET ACTIVE TIME 250 610 1000 ms
STROBE
Pulse Width 70 ns
Timeout Period 62.5 150 250 ms TD = 0 V.
250 600 1000 ms TD = floating.
500 1200 2000 ms TD = V
CC
.
V
CC
Fall Time 10 μs Guaranteed by design.
Rise Time 0 μs Guaranteed by design.
V
CC
FAIL DETECT TO RESET
OUTPUT DELAY
RESET and RESET
are logically correct.
50 μs After V
CC
falls below the set tolerance voltage (see Figure 9).
250 610 1000 ms After V
CC
rises above the set tolerance voltage.
ADM1232
Rev. C | Page 4 of 12
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
T
A
= 25°C unless otherwise noted.
Table 2.
Parameter Rating
V
CC
5.5 V
Logic Inputs −0.3 V to V
CC
+ 0.3 V
Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 10 sec) 300°C
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
Power Dissipation
N-8
1
1000 mW
RW-16, RM-8
2
900 mW
R-8
2
900 μW
θ
JA
is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 3. Thermal Resistance
Package Type θ
JA
Unit
8-Lead PDIP (N-8) 100 °C/W
16-Lead SOIC_W (RW-16) 73 °C/W
8-Lead MSOP (RM-8) 206 °C/W
8-Lead SOIC_N (R-8) 153 °C/W
ESD CAUTION
1
Derate by 13.5 mW/°C above 25°C.
2
Derate by 12 mW/°C above 25°C.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ADM1232
Rev. C | Page 5 of 12
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
NC
1
PB RESET
2
NC
3
TD
4
NC
16
V
CC
15
NC
14
STROBE
13
NC
5
NC
12
TOLERANCE
6
RESET
11
NC
7
NC
10
GND
8
RESET
9
NC = NO CONNECT
ADM1232
TOP VIEW
(Not to Scale)
07522-003
ADM1232
TOP VIEW
(Not to Scale)
Figure 3. RW-16 Pin Configuration
PB RESET
1
V
CC
8
TD
2
STROBE
7
TOLERANCE
3
RESET
6
GND
4
RESET
5
07522-004
Figure 4. RM-8 Pin Configuration
PB RESET
1
TD
2
TOLERANCE
3
GND
4
V
CC
8
STROBE
7
RESET
6
ADM1232
TOP VIEW
(Not to Scale)
RESET
5
07522-005
Figure 5. N-8 and R-8 Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic Description
RW-16
N-8, R-8,
RM-8
1, 3, 5, 7,
10, 12,
14, 16
NC No Connection.
2 1
PB RESET
Push-Button Reset Input. This debounced input ignores pulses of less than 1 ms and is
guaranteed to respond to pulses greater than 20 ms.
4 2 TD
Time Delay Set. This input allows the user to select the maximum amount of time that the
ADM1232 allows the STROBE
input to remain inactive—that is, STROBE is not receiving any
high-to-low transitions—without forcing the ADM1232 to generate a RESET pulse.
See the section, , and the Specifications Figure 8 STROBE
Timeout Selection section.
6 3 TOLERANCE
Tolerance Input. This input determines how much the supply voltage is allowed to decrease (as a
percentage) before a RESET is asserted. Connect this pin to V
CC
for 10% and to GND for 5%.
8 4 GND 0 V Ground Reference for All Signals.
9 5 RESET
Active High Logic Output. This pin is asserted when any of the following events occurs:
V
CC
decreases below the amount specified by the TOLERANCE input; when PB RESET is forced low;
if there are no high-to-low transitions within the limits set by TD at STROBE; and during power-up.
11 6
RESET
Inverse of RESET. This pin has an open-drain output.
13 7
STROBE
The STROBE input is used to monitor the activity of a microprocessor. If there are no high-to-low
transitions within the time specified by TD, a reset is asserted.
15 8 V
CC
Power Supply Input, 5 V.
P1-P3P4-P6P7-P9P10-P12P13-P13

ADM1232ARM

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Manufacturer:
Analog Devices Inc.
Description:
Supervisory Circuits RESET GENERATOR I.C.
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