74ACT18825SSC

© 1999 Fairchild Semiconductor Corporation DS0500292 www.fairchildsemi.com
August 1999
Revised October 1999
74ACT18825 18-Bit Buffer/Line Driver with 3-STATE Outputs
74ACT18825
18-Bit Buffer/Line Driver with 3-STATE Outputs
General Description
The ACT18825 contains eighteen non-inverting buffers
with 3-STATE outputs designed to be employed as a mem-
ory and address driver, clock driver, or bus oriented trans-
mitter/receiver. The device is byte controlled. Each byte
has separate 3-STATE control inputs which can be shorted
together for full 18-bit operation.
Features
Broadside pinout allows for easy board layout
Separate control logic for each byte
Extra data width for wider address/data paths or buses
carrying parity
Outputs source/sink 24 mA
TTL-compatible inputs
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Connection Diagram
FACT, FACT Quiet Series and GTO are trademarks of Fairchild Semiconductor Corporation.
Order Number Package Number Package Description
74ACT18825SSC MS56A 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
74ACT18825MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names Description
OE
n
Output Enable Input (Active LOW)
I
0
–I
17
Inputs
O
0
–O
17
Outputs
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74ACT18825
Functional Description
The ACT18825 contains eighteen non-inverting buffers
with 3-STATE standard outputs. The device is byte con-
trolled with each byte functioning identically, but indepen-
dently of the other. The control pins may be shorted
together to obtain full 8-bit operation. The 3-STATE outputs
are controlled by an Output Enable (OE
n
) input for each
byte. When OE
n
is LOW, the outputs are in 2-state mode.
When OE
n
is HIGH, the outputs are in the high impedance
mode, but this does not interfere with entering new data
into the inputs.
Truth Table
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = HIGH Impedance
Logic Diagram
Inputs Outputs
Byte 1 (0:8) Byte 2 (8:17)
I
0
–I
8
I
9
–I
17
O
0
–O
8
O
9
–O
17
OE
1
OE
2
OE
3
OE
4
LLL LHH H H
HX L L X L Z L
XH L L XH Z H
LLH XLX L Z
LLXHHX H Z
HHH H X X Z Z
LLL L LL L L
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74ACT18825
Absolute Maximum Ratings(Note 1) Recommended Operating
Conditions
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception, to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of FACT circuits outside databook specifications.
DC Electrical Characteristics
Note 2: All outputs loaded; thresholds associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
Supply Voltage (V
CC
) 0.5V to +7.0V
DC Input Diode Current (I
IK
)
V
I
= 0.5V 20 mA
V
I
= V
CC
+0.5V +20 mA
DC Output Diode Current (I
OK
)
V
O
= 0.5V 20 mA
V
O
= V
CC
+0.5V +20 mA
DC Output Voltage (V
O
) 0.5V to V
CC
+ 0.5V
DC Output Source/Sink Current (I
O
) ±50 mA
DC V
CC
or Ground Current
Per Output Pin ±50 mA
Storage Temperature 65°C to +150°C
Supply Voltage (V
CC
) 4.5V to 5.5V
Input Voltage (V
I
)0V to V
CC
Output Voltage (V
O
)0V to V
CC
Operating Temperature (T
A
) 40°C to +85°C
Minimum Input Edge Rate (Vt) 125 mV/ns
V
IN
from 0.8V to 2.0V
V
CC
@ 4.5V, 5.5V
Symbol Parameter
V
CC
T
A
= +25°CT
A
= 40°C to +85°C
Units Conditions
(V) Typ Guaranteed Limits
V
IH
Minimum HIGH 4.5 1.5 2.0 2.0
V
V
OUT
= 0.1V
Input Voltage 5.5 1.5 2.0 2.0 or V
CC
0.1V
V
IL
Maximum LOW 4.5 1.5 0.8 0.8
V
V
OUT
= 0.1V
Input Voltage 5.5 1.5 0.8 0.8 or V
CC
0.1V
V
OH
Minimum HIGH 4.5 4.49 4.4 4.4
VI
OUT
= 50 µA
Output Voltage 5.5 5.49 5.4 5.4
V
IN
= V
IL
or V
IH
4.5 3.86 3.76 V I
OH
= 24 mA
5.5 4.86 4.76 I
OH
= 24 mA (Note 2)
V
OL
Maximum LOW 4.5 0.001 0.1 0.1
VI
OUT
= 50 µA
Output Voltage 5.5 0.001 0.1 0.1
V
IN
= V
IL
or V
IH
4.5 0.36 0.44 V I
OL
= 24 mA
5.5 0.36 0.44 I
OL
= 24 mA (Note 2)
I
OZ
Maximum 3-STATE
5.5 ±0.5 ±5.0 µA
V
I
= V
IL
, V
IH
Leakage Current V
O
= V
CC
, GND
I
IN
Maximum Input Leakage Current 5.5 ± 0.1 ± 1.0 µAV
I
= V
CC
, GND
I
CCT
Maximum I
CC
/Input 5.5 0.6 1.5 mA V
I
= V
CC
2.1V
I
CC
Maximum Quiescent Supply Current 5.5 8.0 80.0 µAV
IN
= V
CC
or GND
I
OLD
Minimum Dynamic
5.5
75 mA V
OLD
= 1.65V Max
I
OHD
Output Current (Note 3) 75 mA V
OHD
= 3.85V Min

74ACT18825SSC

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
IC BUF NON-INVERT 5.5V 56SSOP
Lifecycle:
New from this manufacturer.
Delivery:
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