9
FN7288.4
January 26, 2012
Block Diagram
Applications Information
Product Description
The EL7457 is a high performance 40MHz high speed quad
driver. Each channel of the EL7457 consists of a single
P-channel high side driver and a single N-channel low side
driver. These 3Ω devices will pull the output (OUT
X
) to either
the high or low voltage, on V
H
and V
L
respectively,
depending on the input logic signal (IN
X
). It should be noted
that there is only one set of high and low voltage pins.
A common output enable (OE) pin is available on the
EL7457. This pin, when pulled low will put all outputs in to
the high impedance state.
The EL7457 is available in 16-pin SO (0.150"), 16-pin
QSOP, and ultra-small 16-pin QFN packages. The relevant
package should be chosen depending on the calculated
power dissipation.
Supply Voltage Range and Input Compatibility
The EL7457 is designed for operation on supplies from 5V to
15V with 10% tolerance (i.e. 4.5V to 18V). The table on page
6 shows the specifications for the relationship between the
V
S
+, V
S
-, V
H
, V
L
, and GND pins. The EL7457 does not
contain a true analog switch and therefore V
L
should always
be less than V
H
.
All input pins are compatible with both 3V and 5V CMOS
signals With a positive supply (V
S
+) of 5V, the EL7457 is
also compatible with TTL inputs.
Power Supply Bypassing
When using the EL7457, it is very important to use adequate
power supply bypassing. The high switching currents
developed by the EL7457 necessitate the use of a bypass
capacitor on both the positive and negative supplies. It is
recommended that a 4.7µF tantalum capacitor be used in
parallel with a 0.1µF low-inductance ceramic MLC capacitor.
These should be placed as close to the supply pins as
possible. It is also recommended that the V
H
and V
L
pins
have some level of bypassing, especially if the EL7457 is
driving highly capacitive loads.
Power Dissipation Calculation
When switching at high speeds, or driving heavy loads, the
EL7457 drive capability is limited by the rise in die
temperature brought about by internal power dissipation. For
reliable operation die temperature must be kept below
T
JMAX
(125°C). It is necessary to calculate the power
dissipation for a given application prior to selecting package
type.
Power dissipation may be calculated:
where:
V
S
is the total power supply to the EL7457 (from V
S
+ to
V
S
-)
V
OUT
is the swing on the output (V
H
- V
L
)
C
L
is the load capacitance
C
INT
is the internal load capacitance (80pF max)
I
S
is the quiescent supply current (3mA max)
f is frequency
Having obtained the application’s power dissipation, the
maximum junction temperature can be calculated:
where:
T
JMAX
is the maximum junction temperature (125°C)
T
MAX
is the maximum ambient operating temperature
PD is the power dissipation calculated above
θ
JA
is the thermal resistance, junction to ambient, of the
application (package + PCB combination). Refer to the
Package Power Dissipation curves on page 6.
3-STATE
CONTROL
LEVEL
SHIFTER
OUTPUT
V
L
V
H
OE
INPUT
V
S
+
GND
V
S
-
PD V
S
I
S
×()C
INT
V
S
2
× f×()C
L
V
OUT
2
× f×()+
1
4
∑
+=
(EQ. 1)
T
JMAX
T
MAX
Θ
JA
PD×+=
(EQ. 2)
EL7457
