9397 750 12534 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 01 — 29 November 2005 13 of 20
Philips Semiconductors
PCK9448
3.3 V/2.5 V LVCMOS 1 : 12 clock fan-out buffer
(2)
In Equation 2, P stands for the number of outputs with a parallel or Thevenin termination;
V
OL
, I
OL
, V
OH
and I
OH
are a function of the output termination technique; δ
o
is the clock
signal duty cycle. If transmission lines are used, ΣC
L
is zero in Equation 2 and can be
eliminated. In general, the use of controlled transmission line techniques eliminates the
impact of the lumped capacitive loads at the end lines and greatly reduces the power
dissipation of the device. Equation 3 describes the die junction temperature T
j
as a
function of the power consumption.
(3)
Where R
th(j-a)
is the thermal impedance of the package (junction-to-ambient) and T
amb
is
the ambient temperature. According to Table 10, the junction temperature can be used to
estimate the long-term device reliability. Further, combining Equation 1 and Equation 2
results in a maximum operating frequency for the PCK9448 in a series terminated
transmission line system, Equation 4.
(4)
T
j(max)
should be selected according to the MTBF system requirements and Table 10.
R
th(j-a)
can be derived from Table 11. The R
th(j-a)
represent data based on 1S2P boards;
using 2S2P boards will result in a lower thermal impedance than indicated below.
If the calculated maximum frequency is below 350 MHz, it becomes the upper clock speed
limit for the given application conditions. The following four derating charts describe the
safe frequency operation range for the PCK9448. The charts were calculated for a
maximum tolerable die junction temperature of 110 °C (120 °C), corresponding to an
estimated MTBF of 9.1 years (4 years), a supply voltage of 3.3 V and series terminated
transmission line or capacitive loading. Depending on a given set of these operating
conditions and the available device convection, a decision on the maximum operating
frequency can be made.
Table 11: Thermal package impedance of the LQFP32
Convection (LFPM) R
th(j-a)
(°C/W) (1P2S board) R
th(j-a)
(°C/W) (2P2S board)
still air 88 61
100 76 56
200 71 54
300 68 53
400 66 52
500 60 49
P
tot
V
CC
I
qmax()
V
CC
f
clk
×+ NC
PD
C
L
M
+×


××
δ
o
I
OH
V
CC
V
OH
()1DC
Q
()I
OL
V
OL
××+××[]
P
+
=
T
j
T
amb
P
tot
R
th j-a()
×+=
f
clk max()
1
C
PD
N× V
CC
2
×
-----------------------------------------
T
jmax()
T
amb
R
th j-a()
------------------------------------
I
qmax()
V
CC
×()×=
9397 750 12534 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 01 — 29 November 2005 14 of 20
Philips Semiconductors
PCK9448
3.3 V/2.5 V LVCMOS 1 : 12 clock fan-out buffer
10. Test information
Fig 15. CCLK AC test reference for V
CC
= 3.3 V and V
CC
= 2.5 V
Fig 16. PCLK AC test reference
Z
o
= 50
002aaa724
R
T
= 50
V
T
Z
o
= 50
R
T
= 50
V
T
PULSE
GENERATOR
Z = 50
PCK9448
D.U.T.
Z
o
= 50
002aaa725
R
T
= 50
V
T
Z
o
= 50
R
T
= 50
V
T
DIFFERENTIAL
PULSE
GENERATOR
Z = 50
PCK9448
D.U.T.
9397 750 12534 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 01 — 29 November 2005 15 of 20
Philips Semiconductors
PCK9448
3.3 V/2.5 V LVCMOS 1 : 12 clock fan-out buffer
11. Package outline
Fig 17. Package outline SOT358-1 (LQFP32)
UNIT
A
max.
A
1
A
2
A
3
b
p
cE
(1)
eH
E
LL
p
Zywv θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
1.6
0.20
0.05
1.45
1.35
0.25
0.4
0.3
0.18
0.12
7.1
6.9
0.8
9.15
8.85
0.9
0.5
7
0
o
o
0.25 0.11 0.2
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
0.75
0.45
SOT358 -1 136E03 MS-026
03-02-25
05-11-09
D
(1) (1)(1)
7.1
6.9
H
D
9.15
8.85
E
Z
0.9
0.5
D
b
p
e
θ
E
A
1
A
L
p
detail X
L
(A )
3
B
8
c
D
H
b
p
E
H
A
2
v M
B
D
Z
D
A
Z
E
e
v M
A
X
1
32
25
24 17
16
9
y
pin 1 index
w M
w M
0 2.5 5 mm
scale
LQFP32: plastic low profile quad flat package; 32 leads; body 7 x 7 x 1.4 mm
SOT358-1

NB3N853501EDTG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Clock Drivers & Distribution 2:1:4 LVPECL FAN-OUT BUFF
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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