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590UA-DDG

P1-P3P4-P6P7-P9P10-P12
Si590/591
4 Rev. 1.0
\
Table 5. CLK± Output Period Jitter
Parameter Symbol Test Condition Min Typ Max Units
Period Jitter* J
PER
RMS — — 3 ps
Peak-to-Peak — — 35
*Note: Any output mode, including CMOS, LVPECL, LVDS, CML. N = 1000 cycles. Refer to AN279 for further information.
Table 6. Environmental Compliance and Package Information
Parameter Conditions/Test Method
Mechanical Shock MIL-STD-883, Method 2002
Mechanical Vibration MIL-STD-883, Method 2007
Solderability MIL-STD-883, Method 2003
Gross and Fine Leak MIL-STD-883, Method 1014
Resistance to Solder Heat MIL-STD-883, Method 2036
Moisture Sensitivity Level J-STD-020, MSL1
Contact Pads Gold over Nickel
Table 7. Thermal Characteristics
(Typical values T
A
=25ºC, V
DD
=3.3V)
Parameter Symbol Test Condition Min Typ Max Unit
Thermal Resistance Junction to Ambient
JA
Still Air — 84.6 — °C/W
Thermal Resistance Junction to Case
JC
Still Air — 38.8 — °C/W
Ambient Temperature T
A
–40 — 85 °C
Junction Temperature T
J
——125°C
Si590/591
Rev. 1.0 5
Table 8. Absolute Maximum Ratings
1
Parameter
Symbol Rating Units
Maximum Operating Temperature T
AMAX
85 ºC
Supply Voltage, 1.8 V Option V
DD
–0.5 to +1.9 V
Supply Voltage, 2.5/3.3 V Option V
DD
–0.5 to +3.8 V
Input Voltage (any input pin) V
I
–0.5 to V
DD
+ 0.3 V
Storage Temperature T
S
–55 to +125 ºC
ESD Sensitivity (HBM, per JESD22-A114) ESD 2500 V
Soldering Temperature (Pb-free profile)
2
T
PEAK
260 ºC
Soldering Temperature Time @ T
PEAK
(Pb-free profile)
2
t
P
20–40 seconds
Notes:
1. Stresses beyond those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional
operation or specification compliance is not implied at these conditions. Exposure to maximum rating conditions for
extended periods may affect device reliability.
2. The device is compliant with JEDEC J-STD-020C. Refer to Si5xx Packaging FAQ available for download at
www.silabs.com/VCXO for further information, including soldering profiles.
Si590/591
6 Rev. 1.0
2. Pin Descriptions
Table 9. Pinout for Si590 Series
Pin Symbol LVDS/LVPECL/CML Function CMOS Function
1OE*
No connection
Make no external connection to this pin
Output enable
2OE*
Output enable No connection
Make no external connection to this pin
3 GND Electrical and Case Ground Electrical and Case Ground
4 CLK+ Oscillator Output Oscillator Output
5 CLK– Complementary Output No connection
Make no external connection to this pin
6V
DD
Power Supply Voltage Power Supply Voltage
*Note: OE pin includes an internal 17 k pullup resistor to V
DD
for output enable active high or a 17 k pulldown resistor to
GND for output enable active low. See 3. "Ordering Information" on page 7.
Table 10. Pinout for Si591 Series
Pin Symbol LVDS/LVPECL/CML Function
1 OE* Output enable
2
No connection
Make no external connection to this pin
No connection
Make no external connection to this pin
3 GND Electrical and Case Ground
4 CLK+ Oscillator Output
5 CLK– Complementary output
6V
DD
Power Supply Voltage
*Note: OE pin includes an internal 17 k pullup resistor to V
DD
for output enable active high or a 17 k pulldown resistor to
GND for output enable active low. See 3. "Ordering Information" on page 7.
1
2
3
6
5
4GND
NC
V
DD
CLK
NC
OE
(Top View)
1
2
3
6
5
4GND
OE
V
DD
CLK+
CLK–
NC
1
2
3
6
5
4GND
NC
V
DD
CLK+
CLK–
OE
Si590
LVDS/LVPECL/CML
Si590
CMOS
Si591
LVDS/LVPECL/CML
P1-P3P4-P6P7-P9P10-P12

590UA-DDG

Mfr. #:
Buy 590UA-DDG
Manufacturer:
Silicon Labs
Description:
XTAL OSC PROG XO CML 2.5V 50PPM
Lifecycle:
New from this manufacturer.
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