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ADA4004-2ARMZ-RL

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
1.8 nV/√Hz, 36 V Precision Amplifiers
ADA4004-1/ADA4004-2/ADA4004-4
Rev. H Document Feedback
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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Tel: 781.329.4700 ©2006–2015 Analog Devices, Inc. All rights reserved.
Technical Support www.analog.com
FEATURES
Very low voltage noise: 1.8 nV/√Hz
Low input bias current: 90 nA maximum
Offset voltage: 125 µV maximum
High gain: 120 dB
Wide bandwidth: 12 MHz
5 V to 15 V operation
APPLICATIONS
Precision instrumentation
Filter blocks
Microphone preamplifiers
Industrial control
Thermocouples and RTDs
Reference buffers
GENERAL DESCRIPTION
The ADA4004-1/ADA4004-2/ADA4004-4 are 1.8 nV/√Hz
precision amplifiers featuring 40 μV offset, 0.7 μV/°C drift,
12 MHz bandwidth, and low 1.7 mA per amplifier supply current.
The ADA4004-1/ADA4004-2/ADA4004-4 are designed on the
high performance iPolar™ process, enabling improvements such
as reduced noise and power consumption, increased speed and
stability, and smaller footprint size. Novel design techniques enable
the ADA4004-1/ADA4004-2/ADA4004-4 to achieve 1.8 nV/√Hz
voltage noise density and a low 6 Hz 1/f noise corner frequency
while consuming just 1.7 mA per amplifier. The small package
saves board space, reduces cost, and improves layout flexibility.
Applications for these amplifiers include high precision controls,
PLL filters, high performance precision filters, medical and
analytical instrumentation, precision power supply controls,
ATE, and data acquisition systems. Operation is fully specified
from ±5 V to ±15 V from −40°C to +125°C.
The ADA4004-1, ADA4004-2, and ADA4004-4 are members
of a growing series of low noise op amps offered by Analog
Devices, Inc., (see Table 1).
Table 1. Voltage Noise
Pkg. 0.9 nV 1.1 nV 1.8 nV 2.8 nV 3.8 nV
Single AD797 AD8597 ADA4004-1 AD8675 AD8671
Dual AD8599 ADA4004-2 AD8676 AD8672
Quad ADA4004-4 AD8674
PIN CONFIGURATIONS
OUT
1
+IN 3
V– 2
V+5
–IN4
ADA4004-1
TOP VIEW
(Not to Scale)
05577-001
Figure 1. 5-Lead SOT
(RJ-5)
NC
1
–
IN
2
+
IN
3
V–
4
NC
8
V+
7
OUT
6
NC
5
NC = NO CONNECT
ADA4004-1
TOP VIEW
(Not to Scale)
05577-002
Figure 2. 8-Lead SOIC
(R-8)
OUT A
1
–IN A
2
+IN A
3
V–
4
V+
8
OUT B
7
–IN B
6
+IN B
5
ADA4004-2
TOP VIEW
(Not to Scale)
05577-003
Figure 3. 8-Lead MSOP (RM-8) and 8-Lead SOIC (R-8)
05577-091
1
OUT A OUT D
14
2
–IN A –IN D
13
3
+IN A +IN D
12
4
V+ V–
11
5
+IN B +IN C
10
6
–IN B –IN C
9
7
OUT B OUT C
8
ADA4004-4
TOP VIEW
(Not to Scale)
Figure 4. 14-Lead SOIC
(R-14)
–IN A
+IN A
V+
+IN B
–IN D
+IN D
V–
+IN C
–IN B
OUT B
OUT C
–IN C
NC
OUT
A
OUT D
NC
NOTES
1. NC = NO CONNECT.
2. IT IS RECOMMENDED THAT THE EXPOSED PAD
BE CONNECTED TO V–.
05577-005
12
11
10
1
3
4
9
2
6
5
7
8
16
15
14
13
ADA4004-4
TOP VIEW
(Not to Scale)
Figure 5. 16-Lead LFCSP
(CP-16-23)
ADA4004-1/ADA4004-2/ADA4004-4 Data Sheet
Rev. H | Page 2 of 16
TABLE OF CONTENTS
Features .............................................................................................. 1
Applicat ions ....................................................................................... 1
General Description ......................................................................... 1
Pin Configurations ........................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................5
Thermal Resistance .......................................................................5
ESD Caution...................................................................................5
Typical Performance Characteristics ..............................................6
Outline Dimensions ....................................................................... 12
Ordering Guide .......................................................................... 14
REVISION HISTORY
7/15—Rev. G to Rev. H
Changed CP-16-4 to CP-16-23 and Changed LFCSP_VQ to
LFCSP_WQ .................................................................... Throughout
Changes to Figure 5 .......................................................................... 1
Changed Differential Input Voltage Parameter, Table 4 .............. 5
Updated Outline Dimensions ....................................................... 12
Changes to Ordering Guide .......................................................... 15
4/11—Rev. F to Rev. G
Changes to Figure 1 .......................................................................... 1
Updated Outline Dimensions ....................................................... 12
6/10—Rev. E to Rev. F
Added Differential Input Current to Table 4 ................................ 5
Changes to Figure 14 and Figure 17 ............................................... 7
10/09—Rev. D to Rev. E
Changes to Product Title, General Description Section, and
Figure 5 .............................................................................................. 1
Updated Outline Dimensions (RM-8) ......................................... 13
Changes to Ordering Guide .......................................................... 14
6/09—Rev. C to Rev. D
Changes to Figure 5 .......................................................................... 1
10/08—Rev. B to Rev. C
Added ADA4004-1 and ADA4004-2 ............................... Universal
Added 5-Lead SOT, 8-Lead SOIC, and 8-Lead MSOP ....... Universal
Changes to Features Section .................................................................... 1
Added Figure 1 to Figure 3; Renumbered Sequentially ...................... 1
Changes to General Description Section .............................................. 1
Added Table 1; Renumbered Sequentially ............................................ 1
Change to Output Voltage Low Parameter, Table 2 ............................. 3
Changes to Supply Current per Amplifier Parameter, Table 2 .......... 3
Added Phase Margin Parameter, Table 2 ............................................... 3
Change to Output Voltage Low Parameter, Table 3 ............................. 3
Changes to Supply Current per Amplifier Parameter, Table 3 .......... 4
Added Phase Margin Parameter, Table 3 ............................................... 4
Changes to Table 4 ..................................................................................... 5
Changes to Thermal Resistance Section ................................................ 5
Changes to Table 5 ..................................................................................... 5
Update Outline Dimensions .................................................................. 12
Changes to Ordering Guide ................................................................... 13
11/07—Rev. A to Rev. B
Changed V
S
to V
SY
.............................................................. Universal
Changes to General Description ..................................................... 1
Changes to Supply Current per Amplifier ..................................... 3
Changes to Open-Loop Gain ........................................................... 4
Changes to Supply Current per Amplifier ..................................... 4
Changes to Figure 10, Figure 11, Figure 13, and Figure 14 .......... 7
Changes to Figure 26 ......................................................................... 9
Updated Outline Dimensions ....................................................... 12
Changes to Ordering Guide .......................................................... 12
7/06—Rev. 0 to Rev. A
Changes to Table 4 ............................................................................. 5
Updated Outline Dimensions ....................................................... 12
Changes to Ordering Guide .......................................................... 12
1/06—Revision 0: Initial Version
Data Sheet ADA4004-1/ADA4004-2/ADA4004-4
Rev. H | Page 3 of 16
SPECIFICATIONS
V
SY
= ±5 V, V
CM
= 0 V, T
A
= 25°C, unless otherwise specified.
Table 2.
Parameter Symbol Conditions Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage V
OS
40 140 μV
−40°C ≤ T
A
≤ +125°C 300 μV
Input Bias Current I
B
40 85 nA
−40°C
≤
T
A
≤
+125°C 165 nA
Input Offset Current I
OS
40 85 nA
−40°C ≤ T
A
≤ +125°C
100
nA
Input Voltage Range IVR −3.5 +3.5 V
Common-Mode Rejection Ratio CMRR V
CM
= −3.0 V to +3.0 V 105 111 dB
−40°C ≤ T
A
≤ +125°C
110
dB
Open-Loop Gain A
VO
R
L
= 2 kΩ, V
OUT
= −2.5 V to +2.5 V 250 400 V/mV
−40°C ≤ T
A
≤ +125°C 170 V/mV
Offset Voltage Drift ∆V
OS
/∆T −40°C
≤
T
A
≤
+125°C 0.7 1 μV/°C
OUTPUT CHARACTERISTICS
Output Voltage High V
OH
R
L
= 2 kΩ to ground 3.7 3.9 V
−40°C
≤
T
A
≤
+125°C 3.4 3.6 V
Output Voltage Low V
OL
R
L
= 2 kΩ to ground −3.6 −3.55 V
−40°C ≤ T
A
≤ +125°C
−3.6
−3.4
V
Short-Circuit Limit I
SC
25 mA
−40°C ≤ T
A
≤ +125°C mA
Output Current
I
O
V
OUT
= ±3.6 V
±10
mA
POWER SUPPLY
Power Supply Rejection Ratio PSRR V
SY
= ±5 V to ±15 V 110 118 dB
−40°C ≤ T
A
≤ +125°C 110 dB
Supply Current per Amplifier I
SY
2.0 mA
−40°C
≤
T
A
≤
+125°C 2.2 mA
DYNAMIC PERFORMANCE
Slew Rate SR R
L
= 2 kΩ to ground 2.7 V/μs
Gain Bandwidth Product
GBP
12
MHz
Phase Margin
Φ
M
48 Degrees
NOISE PERFORMANCE
Voltage Noise
e
n p-p
f = 0.1 Hz to 10 Hz
0.1
μV p-p
Voltage Noi
se Density e
n
f = 1 kHz 1.8 nV/√Hz
Current Noise Density i
n
f = 10 Hz 3.5 pA/√Hz
Current Noise Density i
n
f = 200 Hz 1.2 pA/√Hz
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

ADA4004-2ARMZ-RL

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Precision Amplifiers 1.8nV/Hz 36V Prec Dual
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