© Semiconductor Components Industries, LLC, 2009
August, 2009 − Rev. 0
1 Publication Order Number:
NB7V58M/D
NB7V58M
1.8 V / 2.5 V / 3.3 V
Differential 2:1 Clock / Data
Multiplexer / Translator
with CML Outputs
Multi−Level Inputs w/ Internal
Termination
Description
The NB7V58M is a high performance differential 2−to−1 Clock or
Data multiplexer. The differential inputs incorporate internal 50 W
termination resistors that are accessed through the VT pin. This
feature allows the NB7V58M to accept various logic level standards,
such as LVPECL, CML or LVDS.
The NB7V58M produces minimal Clock or Data jitter operating up
to 7 GHz or 10.7 Gb/s, respectively. As such, the NB7V58M is ideal
for SONET, GigE, Fiber Channel, Backplane and other Clock/Data
distribution applications.
The 16 mA differential CML outputs provide matching internal
50 W terminations and 400 mV output swings when externally
terminated with a 50 W resistor to V
CC
.
The NB7V58M is offered in a low profile 3 mm x 3 mm 16−pin
QFN package and is a member of the GigaCommt family of high
performance Clock / Data products. For applications that require
equalization, the pin−compatible NB7VQ58M is also available.
Application notes, models, and support documentation are available at
www.onsemi.com.
Features
• Maximum Input Data Rate > 10.7 Gb/s
• Data Dependent Jitter < 10 ps
• Maximum Input Clock Frequency > 7 GHz
• Random Clock Jitter < 0.8 ps RMS
• 180 ps Typical Propagation Delay
• 35 ps Typical Rise and Fall Times
• Differential CML Outputs, 400 mV Peak−to−Peak, Typical
• Operating Range: V
CC
= 1.71 V to 3.6 V with GND = 0 V
• Internal 50 W Input Termination Resistors
• QFN−16 Package, 3 mm x 3 mm
• −40°C to +85°C Ambient Operating Temperature
• This is a Pb−Free Device
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
MARKING
DIAGRAM*
QFN−16
MN SUFFIX
CASE 485G
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
ORDERING INFORMATION
16
NB7V
58M
ALYW G
G
1
SIMPLIFIED BLOCK DIAGRAM
(Note: Microdot may be in either location)
1
