NCV4949APDR2G

NCV4949A
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7
APPLICATION INFORMATION
Supply Voltage Transient
High supply voltage transients can cause a reset output
signal perturbation. For supply voltages greater than 8.0 V
the circuit shows a high immunity of the reset output against
supply transients of more than 100 V/ms. For supply voltages
less than 8.0 V supply transients of more than 0.4 V/ms can
cause a reset signal perturbation. To improve the transient
behavior for supply voltages less than 8.0 V a capacitor at
Pin 3 can be used. A capacitor at Pin 3 (C3 1.0 mF) also
reduces the output noise.
S
o
V
Z
(optional)
V
out
V
out
V
bat
C
s
C
O
C3
R
SO
10 kW
Regulator
1.23 V
ref
2.0 V
2.0 mA
Reset
1.23 V
Sense
GND
Reset
S
i
V
CC
C
T
38 4
6
7
5
2
1
V
CC
+
-
+
-
Preregulator
6.0 V
10 kW
Figure 14. Application Schematic
NOTE: 1. For stability: C
s
1.0 mF, C
O
4.7 mF, ESR < 10 W at 10 kHz
2. Recommended for application: C
s
= 10 mF, C
O
= 10 mF to 74 mF @ T
A
= 125°C
By using higher C
s
it is possible to use higher C
O
.
R
SI2
R
SI1
C
SI
C
CT
R
Reset
NCV4949A
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8
OPERATING DESCRIPTION
The NCV4949A is a monolithic integrated low dropout
voltage regulator. Several outstanding features and auxiliary
functions are implemented to meet the requirements of
supplying microprocessor systems in automotive
applications. It is also suitable in other applications where
the included functions are required. The modular approach
of this device allows the use of other features and functions
independently when required.
Voltage Regulator
The voltage regulator uses an isolated collector vertical
PNP transistor as a regulating element. With this structure,
very low dropout voltage at currents up to 100 mA is
obtained. The dropout operation of the standby regulator is
maintained down to 3.0 V input supply voltage. The output
voltage is regulated up to a transient input supply voltage of
35 V.
A typical curve showing the standby output voltage as a
function of the input supply voltage is shown in Figure 16.
The current consumption of the device (quiescent current)
is less than 200 mA.
To reduce the quiescent current peak in the undervoltage
region and to improve the transient response in this region,
the dropout voltage is controlled. The quiescent current as
a function of the supply input voltage is shown in Figure 17.
Short Circuit Protection:
The maximum output current is internally limited. In case
of short circuit, the output current is foldback current limited
as described in Figure 15.
I
out
(mA)
Figure 15. Foldback Characteristic of V
out
V
out
(V)
0.00
1.00
2.00
3.00
4.00
5.00
6.00
0 50 100 150 200 250 300 350
V
out
5.0 V
35 V5.0 V2.0 V0 V
V
out
V
CC
Figure 16. Output Voltage versus Supply Voltage
Figure 17. Quiescent Current versus Supply Voltag
e
3.0
2.5
2.0
1.5
1.0
0 5.0 10 15 20 25 30
V
CC
, SUPPLY VOLTAGE (V)
0.5
0
R
L
= 5.0 kW
R
L
= 100 W
T
J
= 25°C
I
Q
,
QUIESCENT
CURRENT
(
m
A)
Preregulator
To improve transient immunity a preregulator stabilizes
the internal supply voltage to 6.0 V. This internal voltage is
present at Pin 3 (V
Z
). This voltage should not be used as an
output because the output capability is very small (
100 mA).
This output may be used to improve transient behavior for
supply voltages less than 8.0 V. In this case a capacitor (100
nF − 1.0 mF) must be connected between Pin 3 and GND. If
this feature is not used Pin 3 must be left open.
NCV4949A
www.onsemi.com
9
Reset Circuit
The block circuit diagram of the reset circuit is shown in
Figure 18.
The reset circuit supervises the output voltage. The reset
threshold of 4.5 V is defined by the internal reference
voltage and standby output divider.
The reset pulse delay time t
RD
, is defined by the charge
time of an external capacitor C
T
:
t
RD
+
C
T
x2.0V
2.0 mA
The reaction time of the reset circuit originates from the
discharge time limitation of the reset capacitor C
T
and is
proportional to the value of C
T
. The reaction time of the reset
circuit increases the noise immunity.
1.23 V V
ref
22 k
Out
Reg
2.0 mA
C
T
2.0 V
+
-
Reset
Figure 18. Reset Circuit
Output voltage drops below the reset threshold only
marginally longer than the reaction time results in a shorter
reset delay time.
The nominal reset delay time will be generated for output
voltage drops longer than approximately 50 ms. The typical
reset output waveforms are shown in Figure 19.
VRT + 0.1 V
5.0 V
VRT
V
out
3.0 V
Reset
V
out1
V
in
40 V
t
t
R
t
RD
t
RD
t
RR
Switch On Input Drop Dump
Output
Overload
Switch Off
Figure 19. Typical Reset Output Waveforms
Sense Comparator
The sense comparator compares an input signal with an
internal voltage reference of typical 1.23 V. The use of an
external voltage divider makes this comparator very flexible
in the application.
It can be used to supervise the input voltage either before
or after a protection diode and to provide additional
information to the microprocessor such as low voltage
warnings.
ORDERING INFORMATION
Device Package Shipping
NCV4949ADR2G SOIC−8
(Pb−Free)
2500 / Tape & Reel
NCV4949APDR2G SOIC−8 EP
(Pb−Free)
2500 / Tape & Reel
NCV4949ADWR2G SOIC−20 WB
(Pb−Free)
1000 / Tape & Reel
For information on tape and reel specifications,including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.

NCV4949APDR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
LDO Voltage Regulators 5.0V 100 MA LDO
Lifecycle:
New from this manufacturer.
Delivery:
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