74FCT163827CPAG8

1
IDT74FCT163827A/C
3.3V CMOS 20-BIT BUFFER
INDUSTRIAL TEMPERATURE RANGE
SEPTEMBER 2009INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
© 2009 Integrated Device Technology, Inc. DSC-3083/9
FEATURES:
0.5 MICRON CMOS Technology
Typical tSK(o) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
•VCC = 3.3V ± 0.3V, Normal Range, or VCC = 2.7V to 3.6V, Extended
Range
CMOS power levels (0.4
μ μ
μ μ
μ W typ. static)
Rail-to-rail output swing for increased noise margin
Low Ground Bounce (0.3V typ.)
Inputs (except I/O) can be driven by 3.3V or 5V components
Available in TSSOP package
FUNCTIONAL BLOCK DIAGRAM
IDT74FCT163827A/C
3.3V CMOS 20-BIT BUFFER
DESCRIPTION:
The FCT163827 20-bit buffer is built using advanced dual metal CMOS
technology. These 20-bit bus drivers provide high-performance bus
interface buffering for wide data/address paths or busses carrying parity.
Two pairs of NAND-ed output enable controls offer maximum control
flexibility and are organized to operate the device as two 10-bit buffers or
one 20-bit buffer. Flow-through organization of signal pins simplifies layout.
All inputs are designed with hysteresis for improved noise margin.
The FCT163827 has series current limiting resistors. This offers low
ground bounce, minimal undershoot, and controlled output fall times,
reducing the need for external series terminating resistors.
The inputs of the FCT163827 can be driven from either 3.3V or 5V
devices. This feature allows the use of these devices as translators in a
mixed 3.3V/5V supply system.
2
Y
1
TO NINE OTHER CHANNELS
2
OE
1
2
OE
2
2
A
1
1
Y
1
TO NINE OTHER CHANNELS
1
OE
1
1
OE
2
1
A
1
28
29
42 15
255
56
1
2
INDUSTRIAL TEMPERATURE RANGE
IDT74FCT163827A/C
3.3V CMOS 20-BIT BUFFER
PIN CONFIGURATION
Symbol Description Max Unit
VTERM
(2)
Terminal Voltage with Respect to GND –0.5 to +4.6 V
VTERM
(3)
Terminal Voltage with Respect to GND –0.5 to 7 V
VTERM
(4)
Terminal Voltage with Respect to GND –0.5 to VCC+0.5 V
TSTG Storage Temperature –65 to +150 ° C
I
OUT DC Output Current –60 to +60 mA
ABSOLUTE MAXIMUM RATINGS
(1)(1)
(1)(1)
(1)
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. Vcc terminals.
3. Input terminals.
4. Outputs and I/O terminals.
Symbol Parameter
(1)
Conditions Typ. Max. Unit
CIN Input Capacitance VIN = 0V 3.5 6 pF
C
OUT Output Capacitance VOUT = 0V 3.5 8 pF
CAPACITANCE (TA = +25°C, F = 1.0MHz)
NOTE:
1. This parameter is measured at characterization but not tested.
TSSOP
TOP VIEW
1
Y
1
GND
1
Y
3
V
CC
1
OE
1
GND
1
Y
10
GND
1
Y
2
1
Y
4
1
Y
5
1
Y
6
1
Y
7
1
Y
8
1
Y
9
2
Y
3
V
CC
GND
2
Y
4
2
Y
5
2
Y
7
2
Y
8
2
Y
6
2
OE
1
1
OE
2
1
A
1
1
A
2
GND
1
A
3
1
A
4
V
CC
1
A
5
1
A
6
1
A
7
1
A
8
1
A
9
1
A
10
GND
GND
47
37
38
39
40
41
42
43
44
45
46
33
34
35
36
56
55
49
50
51
52
53
54
48
1
2
3
4
5
6
7
8
9
10
12
13
14
15
16
17
18
19
20
11
21
22
23
24
2
Y
1
2
Y
2
2
Y
10
2
Y
9
2
A
3
2
A
4
V
CC
2
A
5
2
A
7
2
A
8
2
A
6
GND
2
A
9
2
A
10
2
OE
2
29
30
31
3225
26
27
28
2
A
1
2
A
2
PIN DESCRIPTION
Pin Names Description
xOEx Output Enable Inputs (Active LOW)
x Ax Data Inputs
xY x 3-State Outputs
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
Z = High-impedance
FUNCTION TABLE
(1)
Inputs Outputs
xOE1 xOE2 xAx xYx
LL L L
LLH H
HX X Z
XH X Z
3
IDT74FCT163827A/C
3.3V CMOS 20-BIT BUFFER
INDUSTRIAL TEMPERATURE RANGE
Symbol Parameter Test Conditions
(1)
Min. Typ.
(2)
Max. Unit
VIH Input HIGH Level (Input pins) Guaranteed Logic HIGH Level 2 5.5 V
Input HIGH Level (I/O pins) 2 VCC+0.5
VIL Input LOW Level (Input and I/O pins) Guaranteed Logic LOW Level –0.5 0.8 V
IIH Input HIGH Current (Input pins) VCC = Max. VI = 5.5V ±1
Input HIGH Current (I/O pins) V
I = VCC ——±A
I
IL Input LOW Current (Input pins) VI = GND ±1
Input LOW Current (I/O pins) VI = GND ±1
IOZH High Impedance Output Current VCC = Max. VO = VCC ——±A
IOZL (3-State Output pins) VO = GND ±1
VIK Clamp Diode Voltage VCC = Min., IIN = –18mA –0.7 –1.2 V
IODH Output HIGH Current VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V
(3)
–36 –60 –110 mA
IODL Output LOW Current VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V
(3)
50 90 200 mA
V
OH Output HIGH Voltage VCC = Min. IOH = –0.1mA VCC-0.2
V
IN = VIH or VIL IOH = –3mA 2.4 3 V
VCC = 3V IOH = –8mA 2.4
(5)
3—
VIN = VIH or VIL
VOL Output LOW Voltage VCC = Min. IOL = 0.1mA 0.2
VIN = VIH or VIL IOL = 16mA 0.2 0.4
I
OL = 24mA 0.3 0.55 V
VCC = 3V IOL = 24mA 0.3 0.5
VIN = VIH or VIL
IOS Short Circuit Current
(4)
VCC = Max., VO = GND
(3)
–60 –135 –240 mA
VH Input Hysteresis 150 mV
I
CCL Quiescent Power Supply Current VCC = Max. 0.1 10 µA
ICCH VIN = GND or VCC
ICCZ
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: TA = –40°C to +85°C, VCC = 2.7V to 3.6V
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 3.3V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not tested.
5. VOH = VCC–0.6V at rated current.

74FCT163827CPAG8

Mfr. #:
Manufacturer:
IDT
Description:
Buffers & Line Drivers 3.3V CMOS 20-BIT BUF
Lifecycle:
New from this manufacturer.
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