Table 2. Status pin logic
Normal V
CC
< 4 V Over-Temperature I
Tx-out
< - 0.25 A
Status output Low High High High (pulsed)
Although the series coupling impedance is minimized to
reduce insertion loss, it has to be suciently large to limit
the peak current to the desired level in the worst expected
powerline load condition. The peak output current is ef-
fectively limited by the total series coupling resistance,
which is made up of the series resistance of L2, the series
resistance of the fuse and any other resistive element
connected in the coupling network.
To reduce power dissipation when not operating in
transmit mode the line driver stage is shut down to a low
power high impedance state by pulling the Tx-en input
(pin 2) to logic low state.
External Transient Voltage Protection
To protect the HCPL-8100 and HCPL-0810 from high
voltage transients caused by power surges and discon-
necting/connecting the modem, it is necessary to add an
external 6.8 V bi-directional transient voltage protector (as
component D1 shown in Figure 17).
Additional protection from powerline voltage surges can
be achieved by adding an appropriate Metal Oxide Varistor
(MOV) across the powerline terminals after the fuse.
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Data subject to change. Copyright © 2006 Avago Technologies Limited. All rights reserved. Obsoletes 5989-1316EN
AV02-0414EN - June 7, 2007
Internal Protection and Sensing
The HCPL-8100 and HCPL-0810 include several sensing
and protection functions to ensure robust operation under
wide ranging environmental conditions.
The rst feature is the V
CC
Under Voltage Detection (UVD).
In the event of V
CC
dropping to a voltage less than 4 V, the
output status pin is switched to a logic high state.
The next feature is the over-temperature shutdown. This
particular feature protects the line driver stage from over-
temperature stress. Should the IC junction temperature
reach a level above 150°C, the line driver circuit will be shut
down and the output of Status (pin 1) is pulled to the logic
high state simultaneously.
The nal feature is load detection function. The powerline
impedance is quite unpredictable and varies not just
at dierent connection points but is also time variant.
The HCPL-8100 and HCPL-0810 include a current sense
feature, which may be utilized to feedback information on
the instantaneous powerline load condition. Should the
peak current reach a level greater than 0.5 A
PP
, the output
of status pin is pulled to a logic high state for the entire
period the peak current exceeds -0.25 A as shown in Figure
12. Using the period of the pulse together with the known
coupling impedance, the actual powerline load can be cal-
culated. Table 2 shows the logic output of the Status pin.
