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PT7M6709OUEX

P1-P3P4-P6P7-P9P10-P12
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12-07-0002 PT0235-2 07/05/12
7
PT7M6709/6714
Multi-voltage Supervisor
Fig.3 PFO Pull-up and Pull-down Response of PT7M6714, C
PFO
= 47pF
Function Description
The PT7M6709/PT7M6714 have an internally trimmed threshold that minimizes or eliminates the need for external
components. The four open-drain outputs have weak (10μA) internal pull-ups to Vcc, allowing them to interface easily with other
logic devices. The weak internal pull-ups can be overdriven by external pull-ups to any voltage from 0V to 5.5V. Internal circuitry
prevents current flow from the external pull-up voltage to Vcc. The outputs can be wire-ORed for a single power-good signal.
The PT7M6709 quad voltage monitor includes an accurate reference, four precision comparators, and a series of internally
trimmed resistor-divider networks to set the factory-fixed threshold options. The resistor networks scale the specified IN_reset
voltages to match the internal reference/comparator voltage. Adjustable threshold options bypass the internal resistor networks and
connect directly to one of the comparator inputs (an external resistor-divider network is required for threshold matching). The
PT7M6709 monitors power supplies with either 5% or 10% tolerance specifications, depending on the selected version. Additional
high-input-impedance comparator options can be used as an adjustable voltage monitor, general-purpose comparator, or digital-
level transiator.
The PT7M6714 quad voltage monitor/reset offers one fixed input with internal timing for P reset, three power-fail
comparators, and a manual reset input( MR ). RESET asserts low when Vcc drops below its threshold or MR is driven low. Each
of the three power-fail inputs connects directly to one of the comparator inputs.
When any input is higher than the threshold level, the output is high. The output goes low as the input drops below the
threshold voltage. The undervoltage lockout circuitry remains active and all outputs remain low with Vcc down to 1V(Fig.4 and
Fig.5).
Application Information
Hysteresis
The PT7M6709/PT7M6714 has built-in hysteresis which is typically 0.3% of the threshold voltage, so external resistive network
used for causing hysteresis is not required.
Under-voltage Detection Circuit
The open-drain outputs of PT7M6709/PT7M6714 can be configured to detect an under-voltage condition.
The PT7M6709/PT7M6714 can also be used in applications such as system supervisory monitoring, multi-voltage level detection,
and Vcc bar graph monitoring.
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12-07-0002 PT0235-2 07/05/12
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PT7M6709/6714
Multi-voltage Supervisor
Window Detection
A window detector circuit uses two auxiliary inputs in a configuration such as the one shown in Fig 6. External resistors R1-R4 set
the two threshold voltages (V
TH1
and V
TH4
)
of the window detector circuit. Window width (ΔV
TH
) is the difference between the
threshold voltages.(Fig 7).
Adjustable Input
The PT7M6709 offers several monitor options with adjustable reset thresholds. The PT7M6714 has three monitored inputs with
adjustable thresholds. The threshold voltage at each adjustable IN_(PFI_) input is typically 0.62V. To monitor a voltage>0.62V,
connect a resistor-divider network to the circuit.
V
INTH
=0.62V×(R1+R2)/R2 OR R1=R2×(V
INTH
/0.62V-1)
Unused Input
The unused inputs (except the adjustable) are internally connected to ground through the lower resistors of the threshold-setting
resistor pairs. The adjustable input, however, must be connected to ground if unused.
Reset Output
The PT7M6714 RESET output asserts low when Vcc drops below its specified threshold or MR asserts low and remains low for
the reset timeout period(>=140ms) after Vcc exceeds its threshold and MR deasserts. The output is open drain with a weak (10μA)
internal pull up to Vcc. For many applications, no external pull up resistor is required to interface with other logic devices. An
external pull resistor to any voltage from 0V to 5.5V overdrives the internal pull up if interfacing to different logic supply voltage.
Internal circuitry prevents reverse current flow from the external pullup voltage to Vcc.
Manual Reset Input
A logic low on MR asserts RESET low. RESET remains asserted while MR is low, and during the reset timeout
Period (140ms min) after MR returns high. The MR input has an internal 20kΩ pullup resistor to Vcc, so it can be left open if
unused. Drive MR with TTL or CMOS-logic levels, or with open-drain/collector outputs. Connect a normally open momentary
switch from MR to GND to create a manual reset function; external debounce circuitry is not required. If MR is driven from long
cables or if the device is used in a noisy environment, connecting a 0.1μF capacitor from MR to GND provides additional noise
immunity.
Resetting the μP from a second voltage (PT7M6714)
The PT7M6714 can be configured to assert a reset from a second voltage by connecting the power-fail output to manual reset. As
the V
PFI_
falls below its threshold, PFO goes low and asserts the reset output for the reset timeout period after the manual reset
input is deasserted. (Please See Typical Application Circuit.)
Power-Supply Bypassing and Grounding
The PT7M6709/ PT7M6714 operate from a single 2.0V to 5.5V supply. In noise applications, bypass Vcc with a 0.1μF capacitor
as close to Vcc as possible.
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12-07-0002 PT0235-2 07/05/12
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PT7M6709/6714
Multi-voltage Supervisor
2
1
3
4
5
IN1 10
9
8
7
6
IN2
IN3
IN4
GND
Vcc
PWRGD1
PWRGD2
PWRGD3
PWRGD4
PT7M6709
+5V
INPUT
R2
R1
R4
R3
OUT
VTH1=(1+ )VREF
R2
R1
VTH1=(1+ )VREF
R4
R3
VREF=0.62V
Fig.6 Window Detection Fig.7 Output Response of Window Detector Circuit
Fig.8 Setting the Auxiliary Monitor Fig.9 RESET Output Timing Diagram
P1-P3P4-P6P7-P9P10-P12

PT7M6709OUEX

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Manufacturer:
Diodes Incorporated
Description:
Supervisory Circuits Multi-voltage Supervisory
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