MC100E107FNG

© Semiconductor Components Industries, LLC, 2006
November, 2006 Rev. 7
1 Publication Order Number:
MC10E107/D
MC10E107, MC100E107
5VECL Quint 2-Input
XOR/XNOR Gate
Description
The MC10E/100E107 is a quint 2-input XOR/XNOR gate. The
function output F is the OR of all five XOR outputs, while F is the
NOR. The Q outputs need not be terminated if only the F outputs are
to be used.
The 100 Series contains temperature compensation.
Features
600 ps Maximum Propagation Delay
OR/NOR Function Outputs
PECL Mode Operating Range:
V
CC
= 4.2 V to 5.7 V with V
EE
= 0 V
NECL Mode Operating Range:
V
CC
= 0 V with V
EE
= 4.2 V to 5.7 V
Internal Input 50 kW Pulldown Resistors
ESD Protection: Human Body Model; > 2 kV,
Machine Model; > 200 V
Meets or Exceeds JEDEC Standard EIA/JESD78 IC Latchup Test
Moisture Sensitivity Level:
Pb = 1
PbFree = 3
For Additional Information, see Application Note AND8003/D
Flammability Rating: UL 94 V0 @ 0.125 in,
Oxygen Index: 28 to 34
Transistor Count = 140 devices
PbFree Packages are Available*
*For additional information on our PbFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
MARKING DIAGRAM*
xxx = 10 or 100
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G= PbFree Package
PLCC28
FN SUFFIX
CASE 776
MCxxxE107G
AWLYYWW
1
http://onsemi.com
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
ORDERING INFORMATION
MC10E107, MC100E107
http://onsemi.com
2
FFV
CCO
NCD
4a
D
4b
D
3a
D
3b
D
2a
D
2b
V
EE
D
1a
D
1b
D
0a
26
27
28
2
3
4
25 24 23 22 21 20 19
18
17
16
15
14
13
12
11567 8910
Q
4
Q
4
V
CC
Q
3
Q
3
Q
2
Q
2
D
0b
V
CCO
Q
0
Q
0
Q
1
Q
1
V
CCO
1
All V
CC
and V
CCO
pins are tied together on the die.
Figure 1. 28Lead Pinout (Top View)
Warning: All V
CC
, V
CCO
, and V
EE
pins must be externally
connected to Power Supply to guarantee proper operation.
D
0a
D
0b
D
1a
D
1b
D
2a
D
2b
D
3a
D
3b
D
4a
D
4b
F
F
Q
0
Q
0
Q
1
Q
1
Q
2
Q
2
Q
3
Q
3
Q
4
Q
4
Figure 2. Logic Diagram
Pinout: 28-Lead PLCC
(Top View)
Table 1. PIN DESCRIPTION
PIN FUNCTION
D
0a
D
4b
ECL Data Inputs
Q
0
Q
4
ECL XOR Outputs
Q
0
Q
4
ECL XNOR Outputs
F ECL OR Output
F ECL NOR Output
V
CC
, V
CCO
Positive Supply
V
EE
Negative Supply
NC No Connect
Table 2. FUNCTION OUTPUTS
F = (D
0a
D
0b
) + (D
1a
D
1b
) (D
2a
D
2b
) +
(D
3a
D
3b
) + (D
4a
D
4b
)
MC10E107, MC100E107
http://onsemi.com
3
Table 3. MAXIMUM RATINGS
Symbol Parameter Condition 1 Condition 2 Rating Unit
V
CC
PECL Mode Power Supply V
EE
= 0 V 8 V
V
EE
NECL Mode Power Supply V
CC
= 0 V 6 V
V
I
PECL Mode Input Voltage
NECL Mode Input Voltage
V
EE
= 0 V
V
CC
= 0 V
V
I
v V
CC
V
I
w V
EE
6
6
V
V
I
out
Output Current Continuous
Surge
50
100
mA
mA
T
A
Operating Temperature Range 0 to +85 °C
T
stg
Storage Temperature Range 65 to +150 °C
q
JA
Thermal Resistance (JunctiontoAmbient) 0 lfpm
500 lfpm
PLCC28
PLCC28
63.5
43.5
°C/W
°C/W
q
JC
Thermal Resistance (JunctiontoCase) Standard Board PLCC28 22 to 26 °C/W
T
sol
Wave Solder Pb
PbFree
265
265
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 4. 10E SERIES PECL DC CHARACTERISTICS V
CC
= 5.0 V, V
EE
= 0.0 V (Note 1)
Symbol Characteristic
40°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
I
EE
Power Supply Current 42 50 42 50 42 50 mA
V
OH
Output HIGH Voltage (Note 2) 3980 4070 4160 4020 4105 4190 4090 4185 4280 mV
V
OL
Output LOW Voltage (Note 2) 3050 3210 3370 3050 3210 3370 3050 3227 3405 mV
V
IH
Input HIGH Voltage 3830 3995 4160 3870 4030 4190 3940 4110 4280 mV
V
IL
Input LOW Voltage 3050 3285 3520 3050 3285 3520 3050 3302 3555 mV
I
IH
Input HIGH Current 200 200 200
mA
I
IL
Input LOW Current 0.5 0.3 0.5 0.25 0.3 0.2
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary 0.46 V / +0.06 V.
2. Outputs are terminated through a 50 W resistor to V
CC
2.0 V.
Table 5. 10E SERIES NECL DC CHARACTERISTICS V
CCx
= 0.0 V; V
EE
= 5.0 V (Note 3)
Symbol Characteristic
40°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
I
EE
Power Supply Current 42 50 42 50 42 50 mA
V
OH
Output HIGH Voltage (Note 4) 1020 930 840 980 895 810 910 815 720 mV
V
OL
Output LOW Voltage (Note 4) 1950 1790 1630 1950 1790 1630 1950 1773 1595 mV
V
IH
Input HIGH Voltage 1170 1005 840 1130 970 810 1060 890 720 mV
V
IL
Input LOW Voltage 1950 1715 1480 1950 1715 1480 1950 1698 1445 mV
I
IH
Input HIGH Current 200 200 200
mA
I
IL
Input LOW Current 0.5 0.3 0.5 0.065 0.3 0.2
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
3. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary 0.46 V / +0.06 V.
4. Outputs are terminated through a 50 W resistor to V
CC
2.0 V.

MC100E107FNG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Logic Gates 5V ECL Quint 2-Input XOR/XNOR
Lifecycle:
New from this manufacturer.
Delivery:
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