CY28354OXC-400

CY28354-400
..........................Document #: 38-07615 Rev. *B Page 7 of 8
Layout Example for DDR 2.5V
Ordering Information
Ordering Code Package Type Operating Range
Lead Free
CY28354OXC–400 48-pin SSOP Commercial, 0°C to 85 °C
CY28354OXC–400T 48-pin SSOP – Tape and Reel Commercial, 0°C to 85 °C
FB
C4
10 mF
0.005 mF
G G
VDDQ2
C3
48
47
46
45
44
43
42
41
40
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
39
G
= VIA to GND plane layer
V =VIA to respective supply plane layer
Note: Each supply plane or strip should have a
ferrite bead and capacitors
Ceramic Caps C3 = 10–22
F
C4 = 0.005
F
FB = Dale ILB1206 - 300 (300@ 100 MHz) or TDK ACB 2012L-120
All bypass caps = 0.1F ceramic
CY28354-400
G
G
G
G
G
G
G
G
V
G
G
G
G
G
G
G
G
V
G
V
G
V
G
V
G
V
G
V
G
V
..........................Document #: 38-07615 Rev. *B Page 8 of 8
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icon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the
use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features or
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quential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to
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Package Drawing and Dimension
48-LeadShrunkSmallOutlinePackageO48

CY28354OXC-400

Mfr. #:
Manufacturer:
Silicon Labs
Description:
Clock Buffer 273-MHz Output Buffer for 4 DDR DIMMs
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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